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https://github.com/shadps4-emu/shadPS4.git
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image_info: Fix guest size calculation for linear render targets (#3700)
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@@ -72,9 +72,15 @@ ImageInfo::ImageInfo(const AmdGpu::Liverpool::ColorBuffer& buffer,
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meta_info.fmask_addr = buffer.info.compression ? buffer.FmaskAddress() : 0;
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meta_info.fmask_addr = buffer.info.compression ? buffer.FmaskAddress() : 0;
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guest_address = buffer.Address();
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guest_address = buffer.Address();
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const auto color_slice_sz = buffer.GetColorSliceSize();
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if (props.is_tiled) {
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guest_size = color_slice_sz * buffer.NumSlices();
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guest_size = buffer.GetColorSliceSize() * resources.layers;
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mips_layout.emplace_back(guest_size, pitch, buffer.Height(), 0);
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mips_layout.emplace_back(guest_size, pitch, buffer.Height(), 0);
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} else {
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std::tie(std::ignore, std::ignore, guest_size) =
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ImageSizeLinearAligned(pitch, size.height, num_bits, num_samples);
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guest_size *= resources.layers;
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mips_layout.emplace_back(guest_size, pitch, size.height, 0);
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}
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alt_tile = Libraries::Kernel::sceKernelIsNeoMode() && buffer.info.alt_tile_mode;
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alt_tile = Libraries::Kernel::sceKernelIsNeoMode() && buffer.info.alt_tile_mode;
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}
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}
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@@ -102,9 +108,15 @@ ImageInfo::ImageInfo(const AmdGpu::Liverpool::DepthBuffer& buffer, u32 num_slice
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stencil_size = pitch * size.height * sizeof(u8);
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stencil_size = pitch * size.height * sizeof(u8);
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guest_address = write_buffer ? buffer.DepthWriteAddress() : buffer.DepthAddress();
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guest_address = write_buffer ? buffer.DepthWriteAddress() : buffer.DepthAddress();
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const auto depth_slice_sz = buffer.GetDepthSliceSize();
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if (props.is_tiled) {
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guest_size = depth_slice_sz * num_slices;
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guest_size = buffer.GetDepthSliceSize() * resources.layers;
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mips_layout.emplace_back(guest_size, pitch, buffer.Height(), 0);
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mips_layout.emplace_back(guest_size, pitch, buffer.Height(), 0);
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} else {
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std::tie(std::ignore, std::ignore, guest_size) =
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ImageSizeLinearAligned(pitch, size.height, num_bits, num_samples);
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guest_size *= resources.layers;
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mips_layout.emplace_back(guest_size, pitch, size.height, 0);
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}
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}
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}
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ImageInfo::ImageInfo(const AmdGpu::Image& image, const Shader::ImageResource& desc) noexcept {
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ImageInfo::ImageInfo(const AmdGpu::Image& image, const Shader::ImageResource& desc) noexcept {
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@@ -164,7 +176,6 @@ void ImageInfo::UpdateSize() {
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}
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}
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switch (array_mode) {
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switch (array_mode) {
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case AmdGpu::ArrayMode::ArrayLinearGeneral:
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case AmdGpu::ArrayMode::ArrayLinearAligned: {
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case AmdGpu::ArrayMode::ArrayLinearAligned: {
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std::tie(mip_info.pitch, mip_info.height, mip_info.size) =
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std::tie(mip_info.pitch, mip_info.height, mip_info.size) =
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ImageSizeLinearAligned(mip_w, mip_h, num_bits, num_samples);
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ImageSizeLinearAligned(mip_w, mip_h, num_bits, num_samples);
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@@ -575,6 +575,9 @@ ImageView& TextureCache::FindTexture(ImageId image_id, const BaseDesc& desc) {
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ImageView& TextureCache::FindRenderTarget(ImageId image_id, const BaseDesc& desc) {
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ImageView& TextureCache::FindRenderTarget(ImageId image_id, const BaseDesc& desc) {
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Image& image = slot_images[image_id];
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Image& image = slot_images[image_id];
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image.flags |= ImageFlagBits::GpuModified;
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image.flags |= ImageFlagBits::GpuModified;
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if (Config::readbackLinearImages() && !image.info.props.is_tiled) {
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download_images.emplace(image_id);
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}
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image.usage.render_target = 1u;
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image.usage.render_target = 1u;
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UpdateImage(image_id);
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UpdateImage(image_id);
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