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shader_recompiler: Use VM bit for conditional discard (#3306)

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TheTurtle 2025-07-23 20:58:09 +03:00 committed by GitHub
parent 8dc50ffc79
commit 19c3d05ac1
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GPG Key ID: B5690EEEBB952194
5 changed files with 1 additions and 13 deletions
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8
src/shader_recompiler/frontend/control_flow_graph.cpp
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@ -319,8 +319,6 @@ void CFG::LinkBlocks() {
// need to link with the next block.
if (!end_inst.IsTerminateInstruction()) {
auto* next_block = get_block(block.end);
++next_block->num_predecessors;
block.branch_true = next_block;
block.end_class = EndClass::Branch;
continue;
@ -343,17 +341,11 @@ void CFG::LinkBlocks() {
if (end_inst.IsUnconditionalBranch()) {
auto* target_block = get_block(target_pc);
++target_block->num_predecessors;
block.branch_true = target_block;
block.end_class = EndClass::Branch;
} else if (end_inst.IsConditionalBranch()) {
auto* target_block = get_block(target_pc);
++target_block->num_predecessors;
auto* end_block = get_block(block.end);
++end_block->num_predecessors;
block.branch_true = target_block;
block.branch_false = end_block;
block.end_class = EndClass::Branch;

1
src/shader_recompiler/frontend/control_flow_graph.h
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@ -38,7 +38,6 @@ struct Block : Hook {
u32 end;
u32 begin_index;
u32 end_index;
u32 num_predecessors{};
IR::Condition cond{};
GcnInst end_inst{};
EndClass end_class{};

1
src/shader_recompiler/frontend/structured_control_flow.cpp
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@ -635,7 +635,6 @@ private:
case StatementType::Code: {
ensure_block();
if (!stmt.block->is_dummy) {
current_block->has_multiple_predecessors = stmt.block->num_predecessors > 1;
const u32 start = stmt.block->begin_index;
const u32 size = stmt.block->end_index - start + 1;
translator.Translate(current_block, stmt.block->begin,

2
src/shader_recompiler/frontend/translate/export.cpp
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@ -133,7 +133,7 @@ void Translator::ExportUncompressed(IR::Attribute attribute, u32 comp, const IR:
}
void Translator::EmitExport(const GcnInst& inst) {
if (ir.block->has_multiple_predecessors && info.stage == Stage::Fragment) {
if (info.stage == Stage::Fragment && inst.control.exp.vm) {
ir.Discard(ir.LogicalNot(ir.GetExec()));
}

2
src/shader_recompiler/ir/basic_block.h
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@ -150,8 +150,6 @@ public:
std::array<Value, NumScalarRegs> ssa_sbit_values;
std::array<Value, NumVectorRegs> ssa_vreg_values;
bool has_multiple_predecessors{false};
private:
/// Memory pool for instruction list
Common::ObjectPool<Inst>* inst_pool;