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https://github.com/shadps4-emu/shadPS4.git
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@ -83,15 +83,17 @@ void Translator::DS_WRITE(int bit_size, bool is_signed, bool is_pair, const GcnI
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if (bit_size == 32) {
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if (bit_size == 32) {
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ir.WriteShared(32, ir.GetVectorReg(data0), addr0);
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ir.WriteShared(32, ir.GetVectorReg(data0), addr0);
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} else {
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} else {
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ir.WriteShared(64, ir.CompositeConstruct(ir.GetVectorReg(data0), ir.GetVectorReg(data0 + 1)),
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ir.WriteShared(
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addr0);
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64, ir.CompositeConstruct(ir.GetVectorReg(data0), ir.GetVectorReg(data0 + 1)),
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addr0);
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}
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}
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const IR::U32 addr1 = ir.IAdd(addr, ir.Imm32(u32(inst.control.ds.offset1)));
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const IR::U32 addr1 = ir.IAdd(addr, ir.Imm32(u32(inst.control.ds.offset1)));
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if (bit_size == 32) {
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if (bit_size == 32) {
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ir.WriteShared(32, ir.GetVectorReg(data1), addr1);
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ir.WriteShared(32, ir.GetVectorReg(data1), addr1);
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} else {
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} else {
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ir.WriteShared(64, ir.CompositeConstruct(ir.GetVectorReg(data1), ir.GetVectorReg(data1 + 1)),
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ir.WriteShared(
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addr1);
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64, ir.CompositeConstruct(ir.GetVectorReg(data1), ir.GetVectorReg(data1 + 1)),
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addr1);
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}
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}
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} else if (bit_size == 64) {
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} else if (bit_size == 64) {
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const IR::Value data =
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const IR::Value data =
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@ -12,8 +12,7 @@
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namespace Shader::IR {
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namespace Shader::IR {
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template <typename Pred>
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template <typename Pred>
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auto BreadthFirstSearch(const Inst* inst, Pred&& pred)
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auto BreadthFirstSearch(const Inst* inst, Pred&& pred) -> std::invoke_result_t<Pred, const Inst*> {
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-> std::invoke_result_t<Pred, const Inst*> {
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// Most often case the instruction is the desired already.
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// Most often case the instruction is the desired already.
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if (const std::optional result = pred(inst)) {
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if (const std::optional result = pred(inst)) {
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return result;
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return result;
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@ -72,8 +72,8 @@ ImageViewInfo::ImageViewInfo(const AmdGpu::Image& image, bool is_storage) noexce
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if (num_comps == 4) {
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if (num_comps == 4) {
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printf("bad\n");
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printf("bad\n");
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}
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}
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LOG_ERROR(Render_Vulkan, "Storage image (num_comps = {}) requires swizzling {}",
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LOG_ERROR(Render_Vulkan, "Storage image (num_comps = {}) requires swizzling {}", num_comps,
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num_comps, image.DstSelectName());
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image.DstSelectName());
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mapping = vk::ComponentMapping{};
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mapping = vk::ComponentMapping{};
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}
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}
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}
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}
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@ -142,7 +142,7 @@ ImageId TextureCache::FindImage(const ImageInfo& info, bool refresh_on_create) {
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image_ids.push_back(image_id);
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image_ids.push_back(image_id);
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});
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});
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//ASSERT_MSG(image_ids.size() <= 1, "Overlapping images not allowed!");
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// ASSERT_MSG(image_ids.size() <= 1, "Overlapping images not allowed!");
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ImageId image_id{};
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ImageId image_id{};
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if (image_ids.empty()) {
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if (image_ids.empty()) {
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@ -188,8 +188,8 @@ ImageView& TextureCache::FindTexture(const ImageInfo& info, const ImageViewInfo&
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auto& usage = image.info.usage;
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auto& usage = image.info.usage;
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if (view_info.is_storage) {
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if (view_info.is_storage) {
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image.Transit(vk::ImageLayout::eGeneral, vk::AccessFlagBits::eShaderRead |
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image.Transit(vk::ImageLayout::eGeneral,
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vk::AccessFlagBits::eShaderWrite);
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vk::AccessFlagBits::eShaderRead | vk::AccessFlagBits::eShaderWrite);
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usage.storage = true;
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usage.storage = true;
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} else {
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} else {
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const auto new_layout = image.info.IsDepthStencil()
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const auto new_layout = image.info.IsDepthStencil()
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