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control_flow: Avoid adding unnecessary divergant blocks
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parent
6244d00795
commit
29b51567ea
@ -47,6 +47,15 @@ static IR::Condition MakeCondition(const GcnInst& inst) {
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}
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}
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static bool IgnoresExecMask(Opcode opcode) {
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switch (opcode) {
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case Opcode::V_WRITELANE_B32:
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return true;
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default:
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return false;
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}
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}
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static constexpr size_t LabelReserveSize = 32;
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CFG::CFG(Common::ObjectPool<Block>& block_pool_, std::span<const GcnInst> inst_list_)
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@ -133,6 +142,9 @@ void CFG::EmitDivergenceLabels() {
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curr_begin = -1;
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continue;
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}
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// If all instructions in the scope ignore exec masking, we shouldn't insert a scope.
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const auto start = inst_list.begin() + curr_begin + 1;
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if (!std::ranges::all_of(start, inst_list.begin() + index, IgnoresExecMask, &GcnInst::opcode)) {
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// Add a label to the instruction right after the open scope call.
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// It is the start of a new basic block.
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const auto& save_inst = inst_list[curr_begin];
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@ -148,6 +160,7 @@ void CFG::EmitDivergenceLabels() {
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if (is_close) {
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AddLabel(index_to_pc[index]);
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}
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}
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// Reset scope begin.
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curr_begin = -1;
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}
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@ -702,7 +702,7 @@ Liverpool::Task Liverpool::ProcessCompute(std::span<const u32> acb, int vqid) {
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false);
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} else if (dma_data->src_sel == DmaDataSrc::Gds &&
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dma_data->dst_sel == DmaDataDst::Memory) {
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LOG_WARNING(Render_Vulkan, "GDS memory read");
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// LOG_WARNING(Render_Vulkan, "GDS memory read");
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} else if (dma_data->src_sel == DmaDataSrc::Memory &&
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dma_data->dst_sel == DmaDataDst::Memory) {
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rasterizer->InlineData(dma_data->DstAddress<VAddr>(),
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