mirror of
https://github.com/shadps4-emu/shadPS4.git
synced 2025-07-23 10:35:03 +00:00
video_core: Improve some data validity
This commit is contained in:
parent
929853321b
commit
2ca34c4d94
@ -15,6 +15,7 @@
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#include "video_core/amdgpu/pm4_cmds.h"
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#include "video_core/renderdoc.h"
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#include "video_core/renderer_vulkan/vk_rasterizer.h"
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#include "video_core/renderer_vulkan/vk_scheduler.h"
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namespace AmdGpu {
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@ -619,6 +620,10 @@ Liverpool::Task Liverpool::ProcessGraphics(std::span<const u32> dcb, std::span<c
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}
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case PM4ItOpcode::EventWriteEop: {
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const auto* event_eop = reinterpret_cast<const PM4CmdEventWriteEop*>(header);
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if (rasterizer) {
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rasterizer->CommitAsyncFlushes();
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}
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++fence_tick;
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event_eop->SignalFence([](void* address, u64 data, u32 num_bytes) {
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auto* memory = Core::Memory::Instance();
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if (!memory->TryWriteBacking(address, &data, num_bytes)) {
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@ -1016,6 +1021,10 @@ Liverpool::Task Liverpool::ProcessCompute(const u32* acb, u32 acb_dwords, u32 vq
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}
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case PM4ItOpcode::ReleaseMem: {
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const auto* release_mem = reinterpret_cast<const PM4CmdReleaseMem*>(header);
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++fence_tick;
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if (rasterizer) {
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rasterizer->CommitAsyncFlushes();
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}
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release_mem->SignalFence(static_cast<Platform::InterruptId>(queue.pipe_id));
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break;
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}
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@ -1532,6 +1532,10 @@ public:
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return mapped_queues[curr_qid].cs_state;
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}
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inline u64 GetFenceTick() const {
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return fence_tick;
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}
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struct AscQueueInfo {
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static constexpr size_t Pm4BufferSize = 1024;
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VAddr map_addr;
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@ -1627,6 +1631,7 @@ private:
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std::condition_variable_any submit_cv;
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std::queue<Common::UniqueFunction<void>> command_queue{};
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int curr_qid{-1};
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u64 fence_tick{0};
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};
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static_assert(GFX6_3D_REG_INDEX(ps_program) == 0x2C08);
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@ -1,7 +1,8 @@
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// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma clang optimize off
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#include <algorithm>
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#include <new>
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#include "common/alignment.h"
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#include "common/debug.h"
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#include "common/div_ceil.h"
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@ -26,6 +27,7 @@ static constexpr size_t UboStreamBufferSize = 128_MB;
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static constexpr size_t DownloadBufferSize = 128_MB;
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static constexpr size_t DeviceBufferSize = 128_MB;
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static constexpr size_t MaxPageFaults = 1024;
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static constexpr size_t DownloadSizeThreshold = 2_MB;
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BufferCache::BufferCache(const Vulkan::Instance& instance_, Vulkan::Scheduler& scheduler_,
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AmdGpu::Liverpool* liverpool_, TextureCache& texture_cache_, PageManager& tracker_)
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@ -142,7 +144,7 @@ void BufferCache::ReadMemory(VAddr device_addr, u64 size) {
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DownloadBufferMemory(buffer, device_addr, size);
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}
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void BufferCache::DownloadBufferMemory(Buffer& buffer, VAddr device_addr, u64 size) {
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void BufferCache::DownloadBufferMemory(const Buffer& buffer, VAddr device_addr, u64 size) {
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boost::container::small_vector<vk::BufferCopy, 1> copies;
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u64 total_size_bytes = 0;
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memory_tracker.ForEachDownloadRange<true>(
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@ -185,6 +187,91 @@ void BufferCache::DownloadBufferMemory(Buffer& buffer, VAddr device_addr, u64 si
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}
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}
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bool BufferCache::CommitAsyncFlushes() {
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if (pending_download_ranges.Empty()) {
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return false;
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}
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using BufferCopies = boost::container::small_vector<vk::BufferCopy, 8>;
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boost::container::small_vector<BufferCopies, 8> copies;
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boost::container::small_vector<BufferId, 8> buffer_ids;
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u64 total_size_bytes = 0;
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pending_download_ranges.ForEach([&](VAddr interval_lower, VAddr interval_upper) {
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const std::size_t size = interval_upper - interval_lower;
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const VAddr device_addr = interval_lower;
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ForEachBufferInRange(device_addr, size, [&](BufferId buffer_id, Buffer& buffer) {
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const VAddr buffer_start = buffer.CpuAddr();
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const VAddr buffer_end = buffer_start + buffer.SizeBytes();
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const VAddr new_start = std::max(buffer_start, device_addr);
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const VAddr new_end = std::min(buffer_end, device_addr + size);
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auto& buffer_copies = copies.emplace_back();
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buffer_ids.emplace_back(buffer_id);
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memory_tracker.ForEachDownloadRange<false>(new_start, new_end - new_start,
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[&](u64 device_addr_out, u64 range_size) {
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const VAddr buffer_addr = buffer.CpuAddr();
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const auto add_download = [&](VAddr start, VAddr end) {
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const u64 new_offset = start - buffer_addr;
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const u64 new_size = end - start;
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buffer_copies.emplace_back(new_offset, total_size_bytes, new_size);
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// Align up to avoid cache conflicts
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constexpr u64 align = std::hardware_destructive_interference_size;
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constexpr u64 mask = ~(align - 1ULL);
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total_size_bytes += (new_size + align - 1) & mask;
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};
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gpu_modified_ranges.ForEachInRange(device_addr_out, range_size,
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add_download);
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});
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});
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});
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pending_download_ranges.Clear();
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if (copies.empty()) {
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return false;
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}
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const auto [download, offset] = download_buffer.Map(total_size_bytes);
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download_buffer.Commit();
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scheduler.EndRendering();
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const auto cmdbuf = scheduler.CommandBuffer();
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static constexpr vk::MemoryBarrier2 read_barrier = {
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.srcAccessMask = vk::AccessFlagBits2::eMemoryWrite,
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.dstAccessMask = vk::AccessFlagBits2::eTransferRead,
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};
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cmdbuf.pipelineBarrier2(vk::DependencyInfo{
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.dependencyFlags = vk::DependencyFlagBits::eByRegion,
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.memoryBarrierCount = 1u,
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.pMemoryBarriers = &read_barrier,
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});
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for (s32 i = 0; i < buffer_ids.size(); ++i) {
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auto& buffer_copies = copies[i];
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if (buffer_copies.empty()) {
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continue;
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}
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for (auto& copy : buffer_copies) {
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copy.dstOffset += offset;
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}
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const BufferId buffer_id = buffer_ids[i];
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Buffer& buffer = slot_buffers[buffer_id];
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cmdbuf.copyBuffer(buffer.Handle(), download_buffer.Handle(), buffer_copies);
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}
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scheduler.DeferOperation([this, download, offset, buffer_ids, copies]() {
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auto* memory = Core::Memory::Instance();
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for (s32 i = 0; i < buffer_ids.size(); ++i) {
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auto& buffer_copies = copies[i];
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if (buffer_copies.empty()) {
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continue;
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}
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const BufferId buffer_id = buffer_ids[i];
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Buffer& buffer = slot_buffers[buffer_id];
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for (auto& copy : buffer_copies) {
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const VAddr copy_device_addr = buffer.CpuAddr() + copy.srcOffset;
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const u64 dst_offset = copy.dstOffset - offset;
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ASSERT(memory->TryWriteBacking(std::bit_cast<u8*>(copy_device_addr),
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download + dst_offset, copy.size));
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}
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}
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});
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scheduler.Flush();
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return true;
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}
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void BufferCache::BindVertexBuffers(const Vulkan::GraphicsPipeline& pipeline) {
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Vulkan::VertexInputs<vk::VertexInputAttributeDescription2EXT> attributes;
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Vulkan::VertexInputs<vk::VertexInputBindingDescription2EXT> bindings;
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@ -302,9 +389,11 @@ void BufferCache::BindIndexBuffer(u32 index_offset) {
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void BufferCache::InlineData(VAddr address, const void* value, u32 num_bytes, bool is_gds) {
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ASSERT_MSG(address % 4 == 0, "GDS offset must be dword aligned");
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if (!is_gds) {
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if (!IsRegionGpuModified(address, num_bytes)) {
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if (!memory_tracker.IsRegionGpuModified(address, num_bytes)) {
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memcpy(std::bit_cast<void*>(address), value, num_bytes);
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return;
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} else {
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// Write to backing memory to bypass memory protection.
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ASSERT(memory->TryWriteBacking(std::bit_cast<void*>(address), value, num_bytes));
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}
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}
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@ -319,11 +408,14 @@ void BufferCache::InlineData(VAddr address, const void* value, u32 num_bytes, bo
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}
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void BufferCache::CopyBuffer(VAddr dst, VAddr src, u32 num_bytes, bool dst_gds, bool src_gds) {
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if (!dst_gds && !IsRegionGpuModified(dst, num_bytes)) {
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if (!src_gds && !IsRegionGpuModified(src, num_bytes)) {
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if (!src_gds && !memory_tracker.IsRegionGpuModified(src, num_bytes)) {
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if (!dst_gds && !memory_tracker.IsRegionGpuModified(dst, num_bytes)) {
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// Both buffers were not transferred to GPU yet. Can safely copy in host memory.
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memcpy(std::bit_cast<void*>(dst), std::bit_cast<void*>(src), num_bytes);
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return;
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} else if (!dst_gds) {
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// Write to backing memory to bypass memory protection.
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ASSERT(memory->TryWriteBacking(std::bit_cast<void*>(dst), std::bit_cast<void*>(src), num_bytes));
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}
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// Without a readback there's nothing we can do with this
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// Fallback to creating dst buffer on GPU to at least have this data there
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@ -400,35 +492,14 @@ void BufferCache::CopyBuffer(VAddr dst, VAddr src, u32 num_bytes, bool dst_gds,
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});
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}
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void BufferCache::WriteData(VAddr address, const void* value, u32 num_bytes, bool is_gds) {
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ASSERT_MSG(address % 4 == 0, "GDS offset must be dword aligned");
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if (!is_gds && !IsRegionRegistered(address, num_bytes)) {
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memcpy(std::bit_cast<void*>(address), value, num_bytes);
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return;
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}
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Buffer* buffer = [&] {
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if (is_gds) {
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return &gds_buffer;
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}
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const BufferId buffer_id = FindBuffer(address, num_bytes);
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return &slot_buffers[buffer_id];
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}();
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WriteDataBuffer(*buffer, address, value, num_bytes);
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}
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std::pair<Buffer*, u32> BufferCache::ObtainBuffer(VAddr device_addr, u32 size, bool is_written,
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bool is_texel_buffer, BufferId buffer_id) {
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// For small uniform buffers that have not been modified by gpu
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// use device local stream buffer to reduce renderpass breaks.
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// Maybe we want to modify the threshold now that the page size is 16KB?
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static constexpr u64 StreamThreshold = CACHING_PAGESIZE;
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const bool is_gpu_dirty = memory_tracker.IsRegionGpuModified(device_addr, size);
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if (!is_written && size <= StreamThreshold && !is_gpu_dirty) {
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// For small read-only buffers use device local stream buffer to reduce renderpass breaks.
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if (!is_written && size <= CACHING_PAGESIZE && !IsRegionGpuModified(device_addr, size)) {
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const u64 offset = stream_buffer.Copy(device_addr, size, instance.UniformMinAlignment());
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return {&stream_buffer, offset};
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}
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if (!buffer_id || slot_buffers[buffer_id].is_deleted) {
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if (IsBufferInvalid(buffer_id)) {
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buffer_id = FindBuffer(device_addr, size);
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}
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Buffer& buffer = slot_buffers[buffer_id];
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@ -436,17 +507,21 @@ std::pair<Buffer*, u32> BufferCache::ObtainBuffer(VAddr device_addr, u32 size, b
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if (is_written) {
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memory_tracker.MarkRegionAsGpuModified(device_addr, size);
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gpu_modified_ranges.Add(device_addr, size);
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// Don't attempt to download the requested buffer if
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// - It's a texel buffer; Most often used for image copies
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// - It's too large; Large buffers are rarely needed by CPU
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if (!is_texel_buffer && size <= DownloadSizeThreshold) {
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pending_download_ranges.Add(device_addr, size);
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}
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}
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return {&buffer, buffer.Offset(device_addr)};
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}
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std::pair<Buffer*, u32> BufferCache::ObtainBufferForImage(VAddr gpu_addr, u32 size) {
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// Check if any buffer contains the full requested range.
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const u64 page = gpu_addr >> CACHING_PAGEBITS;
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const BufferId buffer_id = page_table[page].buffer_id;
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const BufferId buffer_id = page_table[gpu_addr >> CACHING_PAGEBITS].buffer_id;
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if (buffer_id) {
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Buffer& buffer = slot_buffers[buffer_id];
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if (buffer.IsInBounds(gpu_addr, size)) {
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if (Buffer& buffer = slot_buffers[buffer_id]; buffer.IsInBounds(gpu_addr, size)) {
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SynchronizeBuffer(buffer, gpu_addr, size, false);
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return {&buffer, buffer.Offset(gpu_addr)};
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}
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@ -456,7 +531,6 @@ std::pair<Buffer*, u32> BufferCache::ObtainBufferForImage(VAddr gpu_addr, u32 si
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if (memory_tracker.IsRegionGpuModified(gpu_addr, size)) {
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return ObtainBuffer(gpu_addr, size, false, false);
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}
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// In all other cases, just do a CPU copy to the staging buffer.
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const auto [data, offset] = staging_buffer.Map(size, 16);
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memory->CopySparseMemory(gpu_addr, data, size);
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@ -474,7 +548,12 @@ bool BufferCache::IsRegionCpuModified(VAddr addr, size_t size) {
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}
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bool BufferCache::IsRegionGpuModified(VAddr addr, size_t size) {
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return memory_tracker.IsRegionGpuModified(addr, size);
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if (!memory_tracker.IsRegionGpuModified(addr, size)) {
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return false;
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}
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bool modified = false;
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gpu_modified_ranges.ForEachInRange(addr, size, [&](VAddr, size_t) { modified = true; });
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return modified;
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}
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BufferId BufferCache::FindBuffer(VAddr device_addr, u32 size) {
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@ -814,12 +893,15 @@ void BufferCache::SynchronizeBuffer(Buffer& buffer, VAddr device_addr, u32 size,
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u64 total_size_bytes = 0;
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VAddr buffer_start = buffer.CpuAddr();
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memory_tracker.ForEachUploadRange(device_addr, size, [&](u64 device_addr_out, u64 range_size) {
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copies.push_back(vk::BufferCopy{
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.srcOffset = total_size_bytes,
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.dstOffset = device_addr_out - buffer_start,
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.size = range_size,
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});
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total_size_bytes += range_size;
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//const auto add_upload = [&](VAddr start, u64 size) {
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copies.push_back(vk::BufferCopy{
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.srcOffset = total_size_bytes,
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.dstOffset = device_addr_out - buffer_start,
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.size = range_size,
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});
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total_size_bytes += range_size;
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//};
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//gpu_modified_ranges.ForEachNotInRange(device_addr_out, range_size, add_upload);
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});
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SCOPE_EXIT {
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if (is_texel_buffer) {
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@ -51,6 +51,7 @@ public:
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struct PageData {
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BufferId buffer_id{};
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u64 fence_tick;
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};
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struct Traits {
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@ -125,8 +126,8 @@ public:
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/// Performs buffer to buffer data copy on the GPU.
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void CopyBuffer(VAddr dst, VAddr src, u32 num_bytes, bool dst_gds, bool src_gds);
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/// Writes a value to GPU buffer. (uses staging buffer to temporarily store the data)
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void WriteData(VAddr address, const void* value, u32 num_bytes, bool is_gds);
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/// Schedules all GPU modified ranges since last commit to be copied back the host memory.
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bool CommitAsyncFlushes();
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/// Obtains a buffer for the specified region.
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[[nodiscard]] std::pair<Buffer*, u32> ObtainBuffer(VAddr gpu_addr, u32 size, bool is_written,
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@ -170,7 +171,11 @@ private:
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});
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}
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void DownloadBufferMemory(Buffer& buffer, VAddr device_addr, u64 size);
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inline bool IsBufferInvalid(BufferId buffer_id) const {
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return !buffer_id || slot_buffers[buffer_id].is_deleted;
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}
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void DownloadBufferMemory(const Buffer& buffer, VAddr device_addr, u64 size);
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[[nodiscard]] OverlapResult ResolveOverlaps(VAddr device_addr, u32 wanted_size);
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@ -210,6 +215,7 @@ private:
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Buffer fault_buffer;
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std::shared_mutex slot_buffers_mutex;
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Common::SlotVector<Buffer> slot_buffers;
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RangeSet pending_download_ranges;
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RangeSet gpu_modified_ranges;
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SplitRangeMap<BufferId> buffer_ranges;
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MemoryTracker memory_tracker;
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@ -57,6 +57,15 @@ public:
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});
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}
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/// Unmark region as modified from the host GPU
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void UnmarkRegionAsGpuModified(VAddr dirty_cpu_addr, u64 query_size) noexcept {
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IteratePages<true>(dirty_cpu_addr, query_size,
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[](RegionManager* manager, u64 offset, size_t size) {
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manager->template ChangeRegionState<Type::GPU, false>(
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manager->GetCpuAddr() + offset, size);
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});
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}
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/// Call 'func' for each CPU modified range and unmark those pages as CPU modified
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void ForEachUploadRange(VAddr query_cpu_range, u64 query_size, auto&& func) {
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IteratePages<true>(query_cpu_range, query_size,
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@ -45,6 +45,10 @@ struct RangeSet {
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m_ranges_set.clear();
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}
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bool Empty() const {
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return m_ranges_set.empty();
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}
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bool Contains(VAddr base_address, size_t size) const {
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const VAddr end_address = base_address + size;
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IntervalType interval{base_address, end_address};
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@ -110,6 +114,7 @@ struct RangeSet {
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}
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}
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private:
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IntervalSet m_ranges_set;
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};
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@ -1,8 +1,9 @@
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// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma clang optimize off
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#include <boost/container/small_vector.hpp>
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#include "common/assert.h"
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#include "common/div_ceil.h"
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#include "common/debug.h"
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#include "common/signal_context.h"
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#include "core/memory.h"
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@ -60,6 +60,11 @@ void Rasterizer::CpSync() {
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vk::DependencyFlagBits::eByRegion, ib_barrier, {}, {});
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}
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bool Rasterizer::CommitAsyncFlushes() {
|
||||
scheduler.PopPendingOperations();
|
||||
return buffer_cache.CommitAsyncFlushes();
|
||||
}
|
||||
|
||||
bool Rasterizer::FilterDraw() {
|
||||
const auto& regs = liverpool->regs;
|
||||
// There are several cases (e.g. FCE, FMask/HTile decompression) where we don't need to do an
|
||||
@ -272,6 +277,8 @@ void Rasterizer::EliminateFastClear() {
|
||||
void Rasterizer::Draw(bool is_indexed, u32 index_offset) {
|
||||
RENDERER_TRACE;
|
||||
|
||||
scheduler.PopPendingOperations();
|
||||
|
||||
if (!FilterDraw()) {
|
||||
return;
|
||||
}
|
||||
@ -317,6 +324,8 @@ void Rasterizer::DrawIndirect(bool is_indexed, VAddr arg_address, u32 offset, u3
|
||||
u32 max_count, VAddr count_address) {
|
||||
RENDERER_TRACE;
|
||||
|
||||
scheduler.PopPendingOperations();
|
||||
|
||||
if (!FilterDraw()) {
|
||||
return;
|
||||
}
|
||||
@ -380,6 +389,8 @@ void Rasterizer::DrawIndirect(bool is_indexed, VAddr arg_address, u32 offset, u3
|
||||
void Rasterizer::DispatchDirect() {
|
||||
RENDERER_TRACE;
|
||||
|
||||
scheduler.PopPendingOperations();
|
||||
|
||||
const auto& cs_program = liverpool->GetCsRegs();
|
||||
const ComputePipeline* pipeline = pipeline_cache.GetComputePipeline();
|
||||
if (!pipeline) {
|
||||
@ -407,6 +418,8 @@ void Rasterizer::DispatchDirect() {
|
||||
void Rasterizer::DispatchIndirect(VAddr address, u32 offset, u32 size) {
|
||||
RENDERER_TRACE;
|
||||
|
||||
scheduler.PopPendingOperations();
|
||||
|
||||
const auto& cs_program = liverpool->GetCsRegs();
|
||||
const ComputePipeline* pipeline = pipeline_cache.GetComputePipeline();
|
||||
if (!pipeline) {
|
||||
|
@ -65,6 +65,7 @@ public:
|
||||
void UnmapMemory(VAddr addr, u64 size);
|
||||
|
||||
void CpSync();
|
||||
bool CommitAsyncFlushes();
|
||||
u64 Flush();
|
||||
void Finish();
|
||||
void ProcessFaults();
|
||||
|
@ -65,6 +65,14 @@ void Scheduler::EndRendering() {
|
||||
current_cmdbuf.endRendering();
|
||||
}
|
||||
|
||||
void Scheduler::PopPendingOperations() {
|
||||
master_semaphore.Refresh();
|
||||
while (!pending_ops.empty() && master_semaphore.IsFree(pending_ops.front().gpu_tick)) {
|
||||
pending_ops.front().callback();
|
||||
pending_ops.pop();
|
||||
}
|
||||
}
|
||||
|
||||
void Scheduler::Flush(SubmitInfo& info) {
|
||||
// When flushing, we only send data to the driver; no waiting is necessary.
|
||||
SubmitExecution(info);
|
||||
@ -95,10 +103,7 @@ void Scheduler::Wait(u64 tick) {
|
||||
// We don't currently sync the GPU, and some games are very sensitive to this.
|
||||
// If this becomes a problem, it can be commented out.
|
||||
// Idealy we would implement proper gpu sync.
|
||||
while (!pending_ops.empty() && pending_ops.front().gpu_tick <= tick) {
|
||||
pending_ops.front().callback();
|
||||
pending_ops.pop();
|
||||
}
|
||||
PopPendingOperations();
|
||||
}
|
||||
|
||||
void Scheduler::AllocateWorkerCommandBuffers() {
|
||||
@ -174,11 +179,7 @@ void Scheduler::SubmitExecution(SubmitInfo& info) {
|
||||
master_semaphore.Refresh();
|
||||
AllocateWorkerCommandBuffers();
|
||||
|
||||
// Apply pending operations
|
||||
while (!pending_ops.empty() && IsFree(pending_ops.front().gpu_tick)) {
|
||||
pending_ops.front().callback();
|
||||
pending_ops.pop();
|
||||
}
|
||||
PopPendingOperations();
|
||||
}
|
||||
|
||||
void DynamicState::Commit(const Instance& instance, const vk::CommandBuffer& cmdbuf) {
|
||||
|
@ -323,6 +323,9 @@ public:
|
||||
/// Ends current rendering scope.
|
||||
void EndRendering();
|
||||
|
||||
/// Attempts to execute pending operations whose tick the GPU has caught up with.
|
||||
void PopPendingOperations();
|
||||
|
||||
/// Returns the current render state.
|
||||
const RenderState& GetRenderState() const {
|
||||
return render_state;
|
||||
@ -354,8 +357,8 @@ public:
|
||||
}
|
||||
|
||||
/// Defers an operation until the gpu has reached the current cpu tick.
|
||||
void DeferOperation(Common::UniqueFunction<void>&& func) {
|
||||
pending_ops.emplace(std::move(func), CurrentTick());
|
||||
void DeferOperation(Common::UniqueFunction<void>&& func, bool prev_tick = false) {
|
||||
pending_ops.emplace(std::move(func), prev_tick ? CurrentTick() - 1 : CurrentTick());
|
||||
}
|
||||
|
||||
static std::mutex submit_mutex;
|
||||
|
Loading…
Reference in New Issue
Block a user