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vk_rasterizer: Use dynamic state for depth bounds and bias
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f01d075dac
commit
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@ -492,6 +492,11 @@ struct Liverpool {
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CullMode CullingMode() const {
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CullMode CullingMode() const {
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return static_cast<CullMode>(cull_front | cull_back << 1);
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return static_cast<CullMode>(cull_front | cull_back << 1);
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}
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}
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bool NeedsBias() const {
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return enable_polygon_offset_back || enable_polygon_offset_front ||
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enable_polygon_offset_para;
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}
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};
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};
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union VsOutputConfig {
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union VsOutputConfig {
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@ -134,9 +134,9 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul
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};
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};
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boost::container::static_vector<vk::DynamicState, 14> dynamic_states = {
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boost::container::static_vector<vk::DynamicState, 14> dynamic_states = {
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vk::DynamicState::eViewport,
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vk::DynamicState::eViewport, vk::DynamicState::eScissor,
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vk::DynamicState::eScissor,
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vk::DynamicState::eBlendConstants, vk::DynamicState::eDepthBounds,
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vk::DynamicState::eBlendConstants,
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vk::DynamicState::eDepthBias,
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};
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};
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if (instance.IsColorWriteEnableSupported()) {
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if (instance.IsColorWriteEnableSupported()) {
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@ -210,26 +210,8 @@ bool PipelineCache::RefreshGraphicsKey() {
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!regs.depth_render_control.depth_clear_enable;
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!regs.depth_render_control.depth_clear_enable;
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key.depth_stencil.raw |= regs.depth_control.DepthState();
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key.depth_stencil.raw |= regs.depth_control.DepthState();
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key.depth_stencil.depth_write_enable.Assign(depth_write);
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key.depth_stencil.depth_write_enable.Assign(depth_write);
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if (key.depth_stencil.depth_bounds_enable) {
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key.depth_bounds_min = regs.depth_bounds_min;
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key.depth_bounds_max = regs.depth_bounds_max;
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}
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key.depth_bias_enable = regs.polygon_control.enable_polygon_offset_back ||
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regs.polygon_control.enable_polygon_offset_front ||
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regs.polygon_control.enable_polygon_offset_para;
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if (key.depth_bias_enable) {
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if (regs.polygon_control.enable_polygon_offset_front) {
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key.depth_bias_const_factor = regs.poly_offset.front_offset;
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key.depth_bias_slope_factor = regs.poly_offset.front_scale;
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} else {
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key.depth_bias_const_factor = regs.poly_offset.back_offset;
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key.depth_bias_slope_factor = regs.poly_offset.back_scale;
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}
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key.depth_bias_clamp = regs.poly_offset.depth_bias;
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}
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const auto ds_format = LiverpoolToVK::DepthFormat(db.z_info.format, db.stencil_info.format);
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const auto ds_format = LiverpoolToVK::DepthFormat(db.z_info.format, db.stencil_info.format);
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if (db.z_info.format != AmdGpu::Liverpool::DepthBuffer::ZFormat::Invalid) {
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if (db.z_info.format != AmdGpu::Liverpool::DepthBuffer::ZFormat::Invalid) {
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key.depth_format = ds_format;
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key.depth_format = ds_format;
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} else {
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} else {
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@ -297,6 +297,18 @@ void Rasterizer::UpdateDynamicState(const GraphicsPipeline& pipeline) {
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cmdbuf.setColorWriteEnableEXT(write_ens);
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cmdbuf.setColorWriteEnableEXT(write_ens);
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cmdbuf.setColorWriteMaskEXT(0, write_masks);
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cmdbuf.setColorWriteMaskEXT(0, write_masks);
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}
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}
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if (regs.depth_control.depth_bounds_enable) {
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cmdbuf.setDepthBounds(regs.depth_bounds_min, regs.depth_bounds_max);
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}
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if (regs.polygon_control.NeedsBias()) {
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if (regs.polygon_control.enable_polygon_offset_front) {
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cmdbuf.setDepthBias(regs.poly_offset.front_offset, regs.poly_offset.depth_bias,
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regs.poly_offset.front_scale);
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} else {
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cmdbuf.setDepthBias(regs.poly_offset.back_offset, regs.poly_offset.depth_bias,
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regs.poly_offset.back_scale);
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}
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}
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}
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}
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void Rasterizer::UpdateViewportScissorState() {
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void Rasterizer::UpdateViewportScissorState() {
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