diff --git a/src/video_core/amdgpu/tiling.cpp b/src/video_core/amdgpu/tiling.cpp
index e16d695b1..fa3476b0c 100644
--- a/src/video_core/amdgpu/tiling.cpp
+++ b/src/video_core/amdgpu/tiling.cpp
@@ -216,7 +216,7 @@ u32 GetSampleSplit(TileMode tile_mode) {
     }
 }
 
-u32 GetTileSplit(TileMode tile_mode) {
+u32 GetTileSplitHw(TileMode tile_mode) {
     switch (tile_mode) {
     case TileMode::Depth2DThin64:
     case TileMode::Depth1DThin:
@@ -528,6 +528,18 @@ u32 GetPipeCount(PipeConfig pipe_cfg) {
     }
 }
 
+u32 CalculateTileSplit(TileMode tile_mode, ArrayMode array_mode, MicroTileMode micro_tile_mode,
+                       u32 bpp) {
+    const u32 sample_split = GetSampleSplit(tile_mode);
+    const u32 tile_split_hw = GetTileSplitHw(tile_mode);
+    const u32 tile_thickness = GetMicroTileThickness(array_mode);
+    const u32 tile_bytes_1x = (bpp * MICROTILE_SIZE * MICROTILE_SIZE * tile_thickness + 7) / 8;
+    const u32 color_tile_split = std::max(256U, sample_split * tile_bytes_1x);
+    const u32 tile_split =
+        micro_tile_mode == MicroTileMode::Depth ? tile_split_hw : color_tile_split;
+    return std::min(DRAM_ROW_SIZE, tile_split);
+}
+
 MacroTileMode CalculateMacrotileMode(TileMode tile_mode, u32 bpp, u32 num_samples) {
     ASSERT_MSG(std::has_single_bit(num_samples) && num_samples <= 16, "Invalid sample count {}",
                num_samples);
@@ -537,15 +549,9 @@ MacroTileMode CalculateMacrotileMode(TileMode tile_mode, u32 bpp, u32 num_sample
     ASSERT_MSG(IsMacroTiled(array_mode), "Tile mode not macro tiled");
 
     const MicroTileMode micro_tile_mode = GetMicroTileMode(tile_mode);
-    const u32 sample_split = GetSampleSplit(tile_mode);
-    const u32 tile_split_hw = GetTileSplit(tile_mode);
-
     const u32 tile_thickness = GetMicroTileThickness(array_mode);
     const u32 tile_bytes_1x = bpp * MICROTILE_SIZE * MICROTILE_SIZE * tile_thickness / 8;
-    const u32 color_tile_split = std::max(256U, sample_split * tile_bytes_1x);
-    const u32 tile_split =
-        micro_tile_mode == MicroTileMode::Depth ? tile_split_hw : color_tile_split;
-    const u32 tilesplic = std::min(DRAM_ROW_SIZE, tile_split);
+    const u32 tilesplic = CalculateTileSplit(tile_mode, array_mode, micro_tile_mode, bpp);
     const u32 tile_bytes = std::min(tilesplic, num_samples * tile_bytes_1x);
     const u32 mtm_idx = std::bit_width(tile_bytes / 64) - 1;
     return IsPrt(array_mode) ? MacroTileMode(mtm_idx + 8) : MacroTileMode(mtm_idx);
diff --git a/src/video_core/amdgpu/tiling.h b/src/video_core/amdgpu/tiling.h
index 3cf0d444d..35d01d111 100644
--- a/src/video_core/amdgpu/tiling.h
+++ b/src/video_core/amdgpu/tiling.h
@@ -120,7 +120,7 @@ PipeConfig GetAltPipeConfig(TileMode tile_mode);
 
 u32 GetSampleSplit(TileMode tile_mode);
 
-u32 GetTileSplit(TileMode tile_mode);
+u32 GetTileSplitHw(TileMode tile_mode);
 
 u32 GetBankWidth(MacroTileMode mode);
 
@@ -144,6 +144,9 @@ u32 GetMicroTileThickness(ArrayMode array_mode);
 
 u32 GetPipeCount(PipeConfig pipe_cfg);
 
+u32 CalculateTileSplit(TileMode tile_mode, ArrayMode array_mode, MicroTileMode micro_tile_mode,
+                       u32 bpp);
+
 MacroTileMode CalculateMacrotileMode(TileMode tile_mode, u32 bpp, u32 num_samples);
 
 } // namespace AmdGpu
diff --git a/src/video_core/texture_cache/tile_manager.cpp b/src/video_core/texture_cache/tile_manager.cpp
index d872f8b2e..5154dad46 100644
--- a/src/video_core/texture_cache/tile_manager.cpp
+++ b/src/video_core/texture_cache/tile_manager.cpp
@@ -105,11 +105,12 @@ vk::Pipeline TileManager::GetTilingPipeline(const ImageInfo& info, bool is_tiler
     }
 
     const auto device = instance.GetDevice();
+    const auto micro_tile_mode = AmdGpu::GetMicroTileMode(info.tile_mode);
     std::vector<std::string> defines = {
         fmt::format("BITS_PER_PIXEL={}", info.num_bits),
         fmt::format("NUM_SAMPLES={}", info.num_samples),
         fmt::format("ARRAY_MODE={}", u32(info.array_mode)),
-        fmt::format("MICRO_TILE_MODE={}", u32(AmdGpu::GetMicroTileMode(info.tile_mode))),
+        fmt::format("MICRO_TILE_MODE={}", u32(micro_tile_mode)),
         fmt::format("MICRO_TILE_THICKNESS={}", AmdGpu::GetMicroTileThickness(info.array_mode)),
     };
     if (AmdGpu::IsMacroTiled(info.array_mode)) {
@@ -122,8 +123,9 @@ vk::Pipeline TileManager::GetTilingPipeline(const ImageInfo& info, bool is_tiler
         defines.emplace_back(fmt::format("BANK_HEIGHT={}", AmdGpu::GetBankHeight(macro_tile_mode)));
         defines.emplace_back(fmt::format("NUM_BANKS={}", num_banks));
         defines.emplace_back(fmt::format("NUM_BANK_BITS={}", std::bit_width(num_banks) - 1));
-        defines.emplace_back(
-            fmt::format("TILE_SPLIT_BYTES={}", AmdGpu::GetTileSplit(info.tile_mode)));
+        defines.emplace_back(fmt::format(
+            "TILE_SPLIT_BYTES={}", AmdGpu::CalculateTileSplit(info.tile_mode, info.array_mode,
+                                                              micro_tile_mode, info.num_bits)));
         defines.emplace_back(
             fmt::format("MACRO_TILE_ASPECT={}", AmdGpu::GetMacrotileAspect(macro_tile_mode)));
     }