mirror of
https://github.com/shadps4-emu/shadPS4.git
synced 2025-08-05 00:42:48 +00:00
renderer_vulkan: Rework MRT swizzles and add unsupported format swizzle support.
This commit is contained in:
parent
8a006a2bc6
commit
4e6a7e555e
@ -25,34 +25,28 @@ void Translator::EmitExport(const GcnInst& inst) {
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IR::VectorReg(inst.src[3].code),
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};
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const auto swizzle = [&](u32 comp) {
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const auto set_attribute = [&](u32 comp, IR::F32 value) {
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if (!IR::IsMrt(attrib)) {
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return comp;
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ir.SetAttribute(attrib, value, comp);
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return;
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}
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const u32 index = u32(attrib) - u32(IR::Attribute::RenderTarget0);
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switch (runtime_info.fs_info.color_buffers[index].mrt_swizzle) {
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case MrtSwizzle::Identity:
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return comp;
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case MrtSwizzle::Alt:
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static constexpr std::array<u32, 4> AltSwizzle = {2, 1, 0, 3};
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return AltSwizzle[comp];
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case MrtSwizzle::Reverse:
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static constexpr std::array<u32, 4> RevSwizzle = {3, 2, 1, 0};
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return RevSwizzle[comp];
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case MrtSwizzle::ReverseAlt:
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static constexpr std::array<u32, 4> AltRevSwizzle = {3, 0, 1, 2};
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return AltRevSwizzle[comp];
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default:
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UNREACHABLE();
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const auto [r, g, b, a] = runtime_info.fs_info.color_buffers[index].swizzle;
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const std::array swizzle_array = {r, g, b, a};
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const auto swizzled_comp = swizzle_array[comp];
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if (u32(swizzled_comp) < u32(AmdGpu::CompSwizzle::Red)) {
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ir.SetAttribute(attrib, value, comp);
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return;
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}
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ir.SetAttribute(attrib, value, u32(swizzled_comp) - u32(AmdGpu::CompSwizzle::Red));
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};
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const auto unpack = [&](u32 idx) {
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const IR::Value value = ir.UnpackHalf2x16(ir.GetVectorReg(vsrc[idx]));
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const IR::F32 r = IR::F32{ir.CompositeExtract(value, 0)};
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const IR::F32 g = IR::F32{ir.CompositeExtract(value, 1)};
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ir.SetAttribute(attrib, r, swizzle(idx * 2));
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ir.SetAttribute(attrib, g, swizzle(idx * 2 + 1));
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set_attribute(idx * 2, r);
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set_attribute(idx * 2 + 1, g);
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};
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// Components are float16 packed into a VGPR
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@ -73,7 +67,7 @@ void Translator::EmitExport(const GcnInst& inst) {
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continue;
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}
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const IR::F32 comp = ir.GetVectorReg<IR::F32>(vsrc[i]);
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ir.SetAttribute(attrib, comp, swizzle(i));
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set_attribute(i, comp);
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}
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}
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if (IR::IsMrt(attrib)) {
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@ -475,29 +475,12 @@ void Translator::EmitFetch(const GcnInst& inst) {
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// Read the V# of the attribute to figure out component number and type.
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const auto buffer = info.ReadUdReg<AmdGpu::Buffer>(attrib.sgpr_base, attrib.dword_offset);
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const auto comp = [&](AmdGpu::CompSwizzle swizzle) -> IR::F32 {
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switch (swizzle) {
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case AmdGpu::CompSwizzle::One:
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return ir.Imm32(1.f);
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case AmdGpu::CompSwizzle::Zero:
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return ir.Imm32(0.f);
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case AmdGpu::CompSwizzle::Red:
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return ir.GetAttribute(attr, 0);
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case AmdGpu::CompSwizzle::Green:
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return ir.GetAttribute(attr, 1);
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case AmdGpu::CompSwizzle::Blue:
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return ir.GetAttribute(attr, 2);
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case AmdGpu::CompSwizzle::Alpha:
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return ir.GetAttribute(attr, 3);
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default:
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UNREACHABLE();
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}
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};
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const auto [r, g, b, a] = buffer.DstSelect();
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ir.SetVectorReg(dst_reg++, comp(r));
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ir.SetVectorReg(dst_reg++, comp(g));
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ir.SetVectorReg(dst_reg++, comp(b));
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ir.SetVectorReg(dst_reg++, comp(a));
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const std::array components = buffer.DstSelect().Apply<IR::F32>(
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[&](const u32 index) { return ir.GetAttribute(attr, index); },
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[&](const u32 imm) { return ir.Imm32(float(imm)); });
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for (u32 i = 0; i < components.size(); i++) {
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ir.SetVectorReg(dst_reg++, components[i]);
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}
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// In case of programmable step rates we need to fallback to instance data pulling in
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// shader, so VBs should be bound as regular data buffers
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@ -129,26 +129,10 @@ bool IsImageInstruction(const IR::Inst& inst) {
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}
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IR::Value SwizzleVector(IR::IREmitter& ir, auto sharp, IR::Value texel) {
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const auto comp = [&](AmdGpu::CompSwizzle swizzle) -> IR::Value {
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switch (swizzle) {
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case AmdGpu::CompSwizzle::Zero:
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return ir.Imm32(0.f);
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case AmdGpu::CompSwizzle::One:
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return ir.Imm32(1.f);
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case AmdGpu::CompSwizzle::Red:
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return ir.CompositeExtract(texel, 0);
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case AmdGpu::CompSwizzle::Green:
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return ir.CompositeExtract(texel, 1);
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case AmdGpu::CompSwizzle::Blue:
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return ir.CompositeExtract(texel, 2);
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case AmdGpu::CompSwizzle::Alpha:
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return ir.CompositeExtract(texel, 3);
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default:
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UNREACHABLE();
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}
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};
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const auto [r, g, b, a] = sharp.DstSelect();
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return ir.CompositeConstruct(comp(r), comp(g), comp(b), comp(a));
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const std::array components = sharp.DstSelect().template Apply<IR::Value>(
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[&](const u32 index) { return ir.CompositeExtract(texel, index); },
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[&](const u32 imm) { return ir.Imm32(float(imm)); });
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return ir.CompositeConstruct(components[0], components[1], components[2], components[3]);
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};
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class Descriptors {
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@ -180,7 +180,7 @@ struct FragmentRuntimeInfo {
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std::array<PsInput, 32> inputs;
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struct PsColorBuffer {
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AmdGpu::NumberFormat num_format;
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MrtSwizzle mrt_swizzle;
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AmdGpu::CompMapping swizzle;
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auto operator<=>(const PsColorBuffer&) const noexcept = default;
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};
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@ -889,10 +889,54 @@ struct Liverpool {
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return !info.linear_general;
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}
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NumberFormat NumFormat() const {
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[[nodiscard]] DataFormat DataFormat() const {
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return RemapDataFormat(info.format);
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}
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[[nodiscard]] NumberFormat NumFormat() const {
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// There is a small difference between T# and CB number types, account for it.
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return info.number_type == AmdGpu::NumberFormat::SnormNz ? AmdGpu::NumberFormat::Srgb
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: info.number_type.Value();
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return RemapNumberFormat(info.number_type == NumberFormat::SnormNz
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? NumberFormat::Srgb
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: info.number_type.Value());
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}
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[[nodiscard]] CompMapping Swizzle() const {
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// clang-format off
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static constexpr std::array<std::array<CompMapping, 4>, 4> mrt_swizzles{{
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// Standard
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std::array<CompMapping, 4>{{
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{.r = CompSwizzle::Red, .g = CompSwizzle::Zero, .b = CompSwizzle::Zero, .a = CompSwizzle::Zero},
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{.r = CompSwizzle::Red, .g = CompSwizzle::Green, .b = CompSwizzle::Zero, .a = CompSwizzle::Zero},
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{.r = CompSwizzle::Red, .g = CompSwizzle::Green, .b = CompSwizzle::Blue, .a = CompSwizzle::Zero},
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{.r = CompSwizzle::Red, .g = CompSwizzle::Green, .b = CompSwizzle::Blue, .a = CompSwizzle::Alpha},
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}},
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// Alternate
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std::array<CompMapping, 4>{{
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{.r = CompSwizzle::Zero, .g = CompSwizzle::Red, .b = CompSwizzle::Zero, .a = CompSwizzle::Zero},
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{.r = CompSwizzle::Red, .g = CompSwizzle::Zero, .b = CompSwizzle::Zero, .a = CompSwizzle::Green},
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{.r = CompSwizzle::Red, .g = CompSwizzle::Green, .b = CompSwizzle::Zero, .a = CompSwizzle::Blue},
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{.r = CompSwizzle::Blue, .g = CompSwizzle::Green, .b = CompSwizzle::Red, .a = CompSwizzle::Alpha},
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}},
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// StandardReverse
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std::array<CompMapping, 4>{{
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{CompSwizzle::Zero, CompSwizzle::Zero, CompSwizzle::Red, CompSwizzle::Zero},
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{CompSwizzle::Green, CompSwizzle::Red, CompSwizzle::Zero, CompSwizzle::Zero},
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{CompSwizzle::Blue, CompSwizzle::Green, CompSwizzle::Red, CompSwizzle::Zero},
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{CompSwizzle::Alpha, CompSwizzle::Blue, CompSwizzle::Green, CompSwizzle::Red},
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}},
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// AlternateReverse
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std::array<CompMapping, 4>{{
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{CompSwizzle::Zero, CompSwizzle::Zero, CompSwizzle::Zero, CompSwizzle::Red},
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{CompSwizzle::Green, CompSwizzle::Zero, CompSwizzle::Zero, CompSwizzle::Red},
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{CompSwizzle::Blue, CompSwizzle::Green, CompSwizzle::Zero, CompSwizzle::Red},
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{CompSwizzle::Alpha, CompSwizzle::Red, CompSwizzle::Green, CompSwizzle::Blue},
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}},
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}};
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// clang-format on
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const auto swap_idx = static_cast<u32>(info.comp_swap.Value());
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const auto components_idx = NumComponents(info.format) - 1;
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const auto mrt_swizzle = mrt_swizzles[swap_idx][components_idx];
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return RemapComponents(info.format, mrt_swizzle);
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}
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};
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@ -3,6 +3,7 @@
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#pragma once
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#include <functional>
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#include "common/alignment.h"
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#include "common/assert.h"
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#include "common/bit_field.h"
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@ -27,6 +28,45 @@ struct CompMapping {
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CompSwizzle a : 3;
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auto operator<=>(const CompMapping& other) const = default;
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template <typename T>
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[[nodiscard]] std::array<T, 4> Apply(const std::array<T, 4>& data) const {
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return Apply<T>([&data](const u32 index) { return data[index]; },
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[](const u32 imm) { return T(imm); });
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}
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template <typename T>
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[[nodiscard]] std::array<T, 4> Apply(const std::function<T(u32)>& get_value,
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const std::function<T(u32)>& get_immediate) const {
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return {
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ApplySingle(get_value, get_immediate, r),
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ApplySingle(get_value, get_immediate, g),
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ApplySingle(get_value, get_immediate, b),
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ApplySingle(get_value, get_immediate, a),
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};
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}
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private:
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template <typename T>
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T ApplySingle(const std::function<T(u32)>& get_value,
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const std::function<T(u32)>& get_immediate, const CompSwizzle swizzle) const {
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switch (swizzle) {
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case CompSwizzle::Zero:
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return get_immediate(0);
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case CompSwizzle::One:
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return get_immediate(1);
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case CompSwizzle::Red:
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return get_value(0);
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case CompSwizzle::Green:
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return get_value(1);
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case CompSwizzle::Blue:
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return get_value(2);
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case CompSwizzle::Alpha:
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return get_value(3);
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default:
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UNREACHABLE();
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}
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}
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};
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inline DataFormat RemapDataFormat(const DataFormat format) {
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@ -707,31 +707,6 @@ vk::Format SurfaceFormat(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat nu
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return format->vk_format;
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}
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vk::Format AdjustColorBufferFormat(vk::Format base_format,
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Liverpool::ColorBuffer::SwapMode comp_swap) {
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const bool comp_swap_alt = comp_swap == Liverpool::ColorBuffer::SwapMode::Alternate;
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const bool comp_swap_reverse = comp_swap == Liverpool::ColorBuffer::SwapMode::StandardReverse;
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const bool comp_swap_alt_reverse =
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comp_swap == Liverpool::ColorBuffer::SwapMode::AlternateReverse;
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if (comp_swap_alt) {
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switch (base_format) {
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case vk::Format::eR8G8B8A8Unorm:
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return vk::Format::eB8G8R8A8Unorm;
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case vk::Format::eB8G8R8A8Unorm:
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return vk::Format::eR8G8B8A8Unorm;
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case vk::Format::eR8G8B8A8Srgb:
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return vk::Format::eB8G8R8A8Srgb;
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case vk::Format::eB8G8R8A8Srgb:
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return vk::Format::eR8G8B8A8Srgb;
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case vk::Format::eA2B10G10R10UnormPack32:
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return vk::Format::eA2R10G10B10UnormPack32;
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default:
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break;
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}
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}
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return base_format;
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}
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static constexpr DepthFormatInfo CreateDepthFormatInfo(
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const DepthBuffer::ZFormat z_format, const DepthBuffer::StencilFormat stencil_format,
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const vk::Format vk_format) {
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@ -774,21 +749,12 @@ vk::Format DepthFormat(DepthBuffer::ZFormat z_format, DepthBuffer::StencilFormat
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}
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vk::ClearValue ColorBufferClearValue(const AmdGpu::Liverpool::ColorBuffer& color_buffer) {
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const auto comp_swap = color_buffer.info.comp_swap.Value();
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const auto format = color_buffer.info.format.Value();
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const auto number_type = color_buffer.info.number_type.Value();
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const auto comp_swizzle = color_buffer.Swizzle();
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const auto format = color_buffer.DataFormat();
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const auto number_type = color_buffer.NumFormat();
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const auto& c0 = color_buffer.clear_word0;
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const auto& c1 = color_buffer.clear_word1;
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const auto num_bits = AmdGpu::NumBits(color_buffer.info.format);
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const auto num_components = AmdGpu::NumComponents(format);
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const bool comp_swap_alt =
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comp_swap == AmdGpu::Liverpool::ColorBuffer::SwapMode::Alternate ||
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comp_swap == AmdGpu::Liverpool::ColorBuffer::SwapMode::AlternateReverse;
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const bool comp_swap_reverse =
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comp_swap == AmdGpu::Liverpool::ColorBuffer::SwapMode::StandardReverse ||
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comp_swap == AmdGpu::Liverpool::ColorBuffer::SwapMode::AlternateReverse;
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vk::ClearColorValue color{};
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@ -1109,25 +1075,9 @@ vk::ClearValue ColorBufferClearValue(const AmdGpu::Liverpool::ColorBuffer& color
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break;
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}
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if (num_components == 1) {
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if (comp_swap != Liverpool::ColorBuffer::SwapMode::Standard) {
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color.float32[static_cast<int>(comp_swap)] = color.float32[0];
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color.float32[0] = 0.0f;
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}
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} else {
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if (comp_swap_alt && num_components == 4) {
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std::swap(color.float32[0], color.float32[2]);
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}
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if (comp_swap_reverse) {
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std::reverse(std::begin(color.float32), std::begin(color.float32) + num_components);
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}
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if (comp_swap_alt && num_components != 4) {
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color.float32[3] = color.float32[num_components - 1];
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color.float32[num_components - 1] = 0.0f;
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}
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}
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color.float32 = comp_swizzle.Apply(color.float32);
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color.int32 = comp_swizzle.Apply(color.int32);
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color.uint32 = comp_swizzle.Apply(color.uint32);
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return {.color = color};
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}
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@ -56,9 +56,6 @@ std::span<const SurfaceFormatInfo> SurfaceFormats();
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vk::Format SurfaceFormat(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat num_format);
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vk::Format AdjustColorBufferFormat(vk::Format base_format,
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Liverpool::ColorBuffer::SwapMode comp_swap);
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struct DepthFormatInfo {
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Liverpool::DepthBuffer::ZFormat z_format;
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Liverpool::DepthBuffer::StencilFormat stencil_format;
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@ -32,7 +32,7 @@ struct GraphicsPipelineKey {
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u32 num_color_attachments;
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std::array<vk::Format, Liverpool::NumColorBuffers> color_formats;
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std::array<AmdGpu::NumberFormat, Liverpool::NumColorBuffers> color_num_formats;
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std::array<Liverpool::ColorBuffer::SwapMode, Liverpool::NumColorBuffers> mrt_swizzles;
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std::array<AmdGpu::CompMapping, Liverpool::NumColorBuffers> color_swizzles;
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vk::Format depth_format;
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vk::Format stencil_format;
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@ -168,7 +168,7 @@ const Shader::RuntimeInfo& PipelineCache::BuildRuntimeInfo(Stage stage, LogicalS
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for (u32 i = 0; i < Shader::MaxColorBuffers; i++) {
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info.fs_info.color_buffers[i] = {
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.num_format = graphics_key.color_num_formats[i],
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.mrt_swizzle = static_cast<Shader::MrtSwizzle>(graphics_key.mrt_swizzles[i]),
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.swizzle = graphics_key.color_swizzles[i],
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};
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}
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break;
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@ -304,7 +304,7 @@ bool PipelineCache::RefreshGraphicsKey() {
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key.color_num_formats.fill(AmdGpu::NumberFormat::Unorm);
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key.blend_controls.fill({});
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key.write_masks.fill({});
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key.mrt_swizzles.fill(Liverpool::ColorBuffer::SwapMode::Standard);
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key.color_swizzles.fill({});
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key.vertex_buffer_formats.fill(vk::Format::eUndefined);
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key.patch_control_points = 0;
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@ -327,14 +327,10 @@ bool PipelineCache::RefreshGraphicsKey() {
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continue;
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}
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const auto base_format =
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LiverpoolToVK::SurfaceFormat(col_buf.info.format, col_buf.NumFormat());
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key.color_formats[remapped_cb] =
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LiverpoolToVK::AdjustColorBufferFormat(base_format, col_buf.info.comp_swap.Value());
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LiverpoolToVK::SurfaceFormat(col_buf.DataFormat(), col_buf.NumFormat());
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key.color_num_formats[remapped_cb] = col_buf.NumFormat();
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if (base_format == key.color_formats[remapped_cb]) {
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key.mrt_swizzles[remapped_cb] = col_buf.info.comp_swap.Value();
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}
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key.color_swizzles[remapped_cb] = col_buf.Swizzle();
|
||||
}
|
||||
|
||||
fetch_shader = std::nullopt;
|
||||
@ -450,7 +446,7 @@ bool PipelineCache::RefreshGraphicsKey() {
|
||||
// of the latter we need to change format to undefined, and either way we need to
|
||||
// increment the index for the null attachment binding.
|
||||
key.color_formats[remapped_cb] = vk::Format::eUndefined;
|
||||
key.mrt_swizzles[remapped_cb] = Liverpool::ColorBuffer::SwapMode::Standard;
|
||||
key.color_swizzles[remapped_cb] = {};
|
||||
++remapped_cb;
|
||||
continue;
|
||||
}
|
||||
|
@ -265,9 +265,9 @@ ImageInfo::ImageInfo(const AmdGpu::Liverpool::ColorBuffer& buffer,
|
||||
const AmdGpu::Liverpool::CbDbExtent& hint /*= {}*/) noexcept {
|
||||
props.is_tiled = buffer.IsTiled();
|
||||
tiling_mode = buffer.GetTilingMode();
|
||||
pixel_format = LiverpoolToVK::SurfaceFormat(buffer.info.format, buffer.NumFormat());
|
||||
pixel_format = LiverpoolToVK::SurfaceFormat(buffer.DataFormat(), buffer.NumFormat());
|
||||
num_samples = buffer.NumSamples();
|
||||
num_bits = NumBits(buffer.info.format);
|
||||
num_bits = NumBits(buffer.DataFormat());
|
||||
type = vk::ImageType::e2D;
|
||||
size.width = hint.Valid() ? hint.width : buffer.Pitch();
|
||||
size.height = hint.Valid() ? hint.height : buffer.Height();
|
||||
|
@ -73,13 +73,10 @@ ImageViewInfo::ImageViewInfo(const AmdGpu::Image& image, const Shader::ImageReso
|
||||
}
|
||||
|
||||
ImageViewInfo::ImageViewInfo(const AmdGpu::Liverpool::ColorBuffer& col_buffer) noexcept {
|
||||
const auto base_format =
|
||||
Vulkan::LiverpoolToVK::SurfaceFormat(col_buffer.info.format, col_buffer.NumFormat());
|
||||
range.base.layer = col_buffer.view.slice_start;
|
||||
range.extent.layers = col_buffer.NumSlices() - range.base.layer;
|
||||
type = range.extent.layers > 1 ? vk::ImageViewType::e2DArray : vk::ImageViewType::e2D;
|
||||
format = Vulkan::LiverpoolToVK::AdjustColorBufferFormat(base_format,
|
||||
col_buffer.info.comp_swap.Value());
|
||||
format = Vulkan::LiverpoolToVK::SurfaceFormat(col_buffer.DataFormat(), col_buffer.NumFormat());
|
||||
}
|
||||
|
||||
ImageViewInfo::ImageViewInfo(const AmdGpu::Liverpool::DepthBuffer& depth_buffer,
|
||||
|
Loading…
Reference in New Issue
Block a user