Fix BufferAtomicS/UMax64 SPIR-V emitting

This commit is contained in:
Marcin Mikołajczyk 2025-07-02 20:53:56 +01:00
parent 9eae6b57ce
commit 509ba63928

View File

@ -97,6 +97,8 @@ IR::Type BufferDataType(const IR::Inst& inst, AmdGpu::NumberFormat num_format) {
case IR::Opcode::LoadBufferU64: case IR::Opcode::LoadBufferU64:
case IR::Opcode::StoreBufferU64: case IR::Opcode::StoreBufferU64:
case IR::Opcode::BufferAtomicIAdd64: case IR::Opcode::BufferAtomicIAdd64:
case IR::Opcode::BufferAtomicSMax64:
case IR::Opcode::BufferAtomicUMax64:
return IR::Type::U64; return IR::Type::U64;
case IR::Opcode::LoadBufferFormatF32: case IR::Opcode::LoadBufferFormatF32:
case IR::Opcode::StoreBufferFormatF32: case IR::Opcode::StoreBufferFormatF32:
@ -118,6 +120,8 @@ u32 BufferAddressShift(const IR::Inst& inst, AmdGpu::DataFormat data_format) {
case IR::Opcode::LoadBufferU64: case IR::Opcode::LoadBufferU64:
case IR::Opcode::StoreBufferU64: case IR::Opcode::StoreBufferU64:
case IR::Opcode::BufferAtomicIAdd64: case IR::Opcode::BufferAtomicIAdd64:
case IR::Opcode::BufferAtomicSMax64:
case IR::Opcode::BufferAtomicUMax64:
return 3; return 3;
case IR::Opcode::LoadBufferFormatF32: case IR::Opcode::LoadBufferFormatF32:
case IR::Opcode::StoreBufferFormatF32: { case IR::Opcode::StoreBufferFormatF32: {