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https://github.com/shadps4-emu/shadPS4.git
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renderer: handle disabled clip space
Co-authored-by: IndecisiveTurtle <47210458+raphaelthegreat@users.noreply.github.com>
This commit is contained in:
parent
3b474a12f9
commit
50bbfc4f86
@ -24,10 +24,28 @@ void ConvertDepthMode(EmitContext& ctx) {
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ctx.OpStore(ctx.output_position, vector);
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ctx.OpStore(ctx.output_position, vector);
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}
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}
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void ConvertPositionToClipSpace(EmitContext& ctx) {
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const Id type{ctx.F32[1]};
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Id position{ctx.OpLoad(ctx.F32[4], ctx.output_position)};
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const Id x{ctx.OpCompositeExtract(type, position, 0u)};
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const Id y{ctx.OpCompositeExtract(type, position, 1u)};
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const Id z{ctx.OpCompositeExtract(type, position, 2u)};
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const Id w{ctx.OpCompositeExtract(type, position, 3u)};
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const Id ndc_x{ctx.OpFSub(type, ctx.OpFDiv(type, x, ctx.Constant(type, float(8_KB))),
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ctx.Constant(type, 1.f))};
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const Id ndc_y{ctx.OpFSub(type, ctx.OpFDiv(type, y, ctx.Constant(type, float(8_KB))),
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ctx.Constant(type, 1.f))};
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const Id vector{ctx.OpCompositeConstruct(ctx.F32[4], std::array<Id, 4>({ndc_x, ndc_y, z, w}))};
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ctx.OpStore(ctx.output_position, vector);
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}
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void EmitEpilogue(EmitContext& ctx) {
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void EmitEpilogue(EmitContext& ctx) {
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if (ctx.stage == Stage::Vertex && ctx.runtime_info.vs_info.emulate_depth_negative_one_to_one) {
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if (ctx.stage == Stage::Vertex && ctx.runtime_info.vs_info.emulate_depth_negative_one_to_one) {
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ConvertDepthMode(ctx);
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ConvertDepthMode(ctx);
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}
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}
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if (ctx.stage == Stage::Vertex && ctx.runtime_info.vs_info.clip_disable) {
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ConvertPositionToClipSpace(ctx);
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}
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}
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}
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void EmitDiscard(EmitContext& ctx) {
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void EmitDiscard(EmitContext& ctx) {
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@ -84,6 +84,7 @@ struct VertexRuntimeInfo {
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u32 num_outputs;
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u32 num_outputs;
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std::array<VsOutputMap, 3> outputs;
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std::array<VsOutputMap, 3> outputs;
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bool emulate_depth_negative_one_to_one{};
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bool emulate_depth_negative_one_to_one{};
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bool clip_disable{};
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// Domain
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// Domain
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AmdGpu::TessellationType tess_type;
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AmdGpu::TessellationType tess_type;
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AmdGpu::TessellationTopology tess_topology;
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AmdGpu::TessellationTopology tess_topology;
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@ -92,7 +93,8 @@ struct VertexRuntimeInfo {
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bool operator==(const VertexRuntimeInfo& other) const noexcept {
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bool operator==(const VertexRuntimeInfo& other) const noexcept {
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return emulate_depth_negative_one_to_one == other.emulate_depth_negative_one_to_one &&
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return emulate_depth_negative_one_to_one == other.emulate_depth_negative_one_to_one &&
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tess_type == other.tess_type && tess_topology == other.tess_topology &&
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clip_disable == other.clip_disable && tess_type == other.tess_type &&
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tess_topology == other.tess_topology &&
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tess_partitioning == other.tess_partitioning &&
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tess_partitioning == other.tess_partitioning &&
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hs_output_cp_stride == other.hs_output_cp_stride;
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hs_output_cp_stride == other.hs_output_cp_stride;
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}
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}
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@ -42,13 +42,14 @@ struct GraphicsPipelineKey {
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vk::Format stencil_format;
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vk::Format stencil_format;
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struct {
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struct {
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bool clip_disable : 1;
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bool depth_test_enable : 1;
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bool depth_test_enable : 1;
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bool depth_write_enable : 1;
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bool depth_write_enable : 1;
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bool depth_bounds_test_enable : 1;
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bool depth_bounds_test_enable : 1;
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bool depth_bias_enable : 1;
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bool depth_bias_enable : 1;
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bool stencil_test_enable : 1;
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bool stencil_test_enable : 1;
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// Must be named to be zero-initialized.
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// Must be named to be zero-initialized.
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u8 _unused : 3;
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u8 _unused : 2;
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};
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};
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vk::CompareOp depth_compare_op;
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vk::CompareOp depth_compare_op;
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@ -94,6 +95,10 @@ public:
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return key.mrt_mask;
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return key.mrt_mask;
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}
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}
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auto IsClipDisabled() const {
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return key.clip_disable;
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}
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[[nodiscard]] bool IsPrimitiveListTopology() const {
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[[nodiscard]] bool IsPrimitiveListTopology() const {
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return key.prim_type == AmdGpu::PrimitiveType::PointList ||
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return key.prim_type == AmdGpu::PrimitiveType::PointList ||
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key.prim_type == AmdGpu::PrimitiveType::LineList ||
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key.prim_type == AmdGpu::PrimitiveType::LineList ||
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@ -406,6 +406,7 @@ bool Instance::CreateDevice() {
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},
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},
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vk::PhysicalDevicePrimitiveTopologyListRestartFeaturesEXT{
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vk::PhysicalDevicePrimitiveTopologyListRestartFeaturesEXT{
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.primitiveTopologyListRestart = true,
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.primitiveTopologyListRestart = true,
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.primitiveTopologyPatchListRestart = true,
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},
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},
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vk::PhysicalDeviceFragmentShaderBarycentricFeaturesKHR{
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vk::PhysicalDeviceFragmentShaderBarycentricFeaturesKHR{
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.fragmentShaderBarycentric = true,
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.fragmentShaderBarycentric = true,
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@ -125,6 +125,7 @@ const Shader::RuntimeInfo& PipelineCache::BuildRuntimeInfo(Stage stage, LogicalS
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info.vs_info.emulate_depth_negative_one_to_one =
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info.vs_info.emulate_depth_negative_one_to_one =
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!instance.IsDepthClipControlSupported() &&
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!instance.IsDepthClipControlSupported() &&
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regs.clipper_control.clip_space == Liverpool::ClipSpace::MinusWToW;
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regs.clipper_control.clip_space == Liverpool::ClipSpace::MinusWToW;
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info.vs_info.clip_disable = graphics_key.clip_disable;
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if (l_stage == LogicalStage::TessellationEval) {
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if (l_stage == LogicalStage::TessellationEval) {
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info.vs_info.tess_type = regs.tess_config.type;
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info.vs_info.tess_type = regs.tess_config.type;
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info.vs_info.tess_topology = regs.tess_config.topology;
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info.vs_info.tess_topology = regs.tess_config.topology;
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@ -261,6 +262,15 @@ bool PipelineCache::RefreshGraphicsKey() {
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auto& regs = liverpool->regs;
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auto& regs = liverpool->regs;
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auto& key = graphics_key;
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auto& key = graphics_key;
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const auto& vp_ctl = regs.viewport_control;
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// TODO(roamic): the statement below needs verification with a sample on the real HW.
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// If there is no defined transform to convert from clip space to screen space we assume that
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// clipping is also disabled.
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const bool viewport_disabled = !vp_ctl.xoffset_enable && !vp_ctl.xscale_enable &&
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!vp_ctl.yoffset_enable && !vp_ctl.yscale_enable &&
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!vp_ctl.zoffset_enable && !vp_ctl.zscale_enable;
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key.clip_disable = regs.clipper_control.clip_disable || viewport_disabled;
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key.depth_test_enable = regs.depth_control.depth_enable;
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key.depth_test_enable = regs.depth_control.depth_enable;
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key.depth_write_enable =
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key.depth_write_enable =
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regs.depth_control.depth_write_enable && !regs.depth_render_control.depth_clear_enable;
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regs.depth_control.depth_write_enable && !regs.depth_render_control.depth_clear_enable;
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@ -1032,7 +1032,7 @@ void Rasterizer::UnmapMemory(VAddr addr, u64 size) {
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}
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}
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void Rasterizer::UpdateDynamicState(const GraphicsPipeline& pipeline) {
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void Rasterizer::UpdateDynamicState(const GraphicsPipeline& pipeline) {
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UpdateViewportScissorState();
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UpdateViewportScissorState(pipeline);
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auto& regs = liverpool->regs;
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auto& regs = liverpool->regs;
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const auto cmdbuf = scheduler.CommandBuffer();
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const auto cmdbuf = scheduler.CommandBuffer();
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@ -1112,7 +1112,7 @@ void Rasterizer::UpdateDynamicState(const GraphicsPipeline& pipeline) {
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}
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}
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}
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}
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void Rasterizer::UpdateViewportScissorState() {
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void Rasterizer::UpdateViewportScissorState(const GraphicsPipeline& pipeline) {
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const auto& regs = liverpool->regs;
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const auto& regs = liverpool->regs;
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const auto combined_scissor_value_tl = [](s16 scr, s16 win, s16 gen, s16 win_offset) {
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const auto combined_scissor_value_tl = [](s16 scr, s16 win, s16 gen, s16 win_offset) {
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@ -1157,20 +1157,6 @@ void Rasterizer::UpdateViewportScissorState() {
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if (vp.xscale == 0) {
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if (vp.xscale == 0) {
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continue;
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continue;
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}
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}
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const auto xoffset = vp_ctl.xoffset_enable ? vp.xoffset : 0.f;
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const auto xscale = vp_ctl.xscale_enable ? vp.xscale : 1.f;
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const auto yoffset = vp_ctl.yoffset_enable ? vp.yoffset : 0.f;
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const auto yscale = vp_ctl.yscale_enable ? vp.yscale : 1.f;
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const auto zoffset = vp_ctl.zoffset_enable ? vp.zoffset : 0.f;
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const auto zscale = vp_ctl.zscale_enable ? vp.zscale : 1.f;
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viewports.push_back({
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.x = xoffset - xscale,
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.y = yoffset - yscale,
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.width = xscale * 2.0f,
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.height = yscale * 2.0f,
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.minDepth = zoffset - zscale * reduce_z,
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.maxDepth = zscale + zoffset,
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});
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auto vp_scsr = scsr;
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auto vp_scsr = scsr;
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if (regs.mode_control.vport_scissor_enable) {
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if (regs.mode_control.vport_scissor_enable) {
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@ -1187,13 +1173,42 @@ void Rasterizer::UpdateViewportScissorState() {
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.offset = {vp_scsr.top_left_x, vp_scsr.top_left_y},
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.offset = {vp_scsr.top_left_x, vp_scsr.top_left_y},
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.extent = {vp_scsr.GetWidth(), vp_scsr.GetHeight()},
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.extent = {vp_scsr.GetWidth(), vp_scsr.GetHeight()},
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});
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});
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if (pipeline.IsClipDisabled()) {
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// In case if clipping is disabled we patch the shader to convert vertex position
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// from screen space coordinates to NDC by defining a render space as full hardware
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// window range [0..16383, 0..16383] and setting the viewport to its size.
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viewports.push_back({
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.x = enable_offset ? float(regs.window_offset.window_x_offset) : 0.f,
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.y = enable_offset ? float(regs.window_offset.window_y_offset) : 0.f,
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.width = float(16_KB),
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.height = float(16_KB),
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.minDepth = 0.0,
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.maxDepth = 1.0,
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});
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} else {
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const auto xoffset = vp_ctl.xoffset_enable ? vp.xoffset : 0.f;
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const auto xscale = vp_ctl.xscale_enable ? vp.xscale : 1.f;
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const auto yoffset = vp_ctl.yoffset_enable ? vp.yoffset : 0.f;
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const auto yscale = vp_ctl.yscale_enable ? vp.yscale : 1.f;
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const auto zoffset = vp_ctl.zoffset_enable ? vp.zoffset : 0.f;
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const auto zscale = vp_ctl.zscale_enable ? vp.zscale : 1.f;
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viewports.push_back({
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.x = xoffset - xscale,
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.y = yoffset - yscale,
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.width = xscale * 2.0f,
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.height = yscale * 2.0f,
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.minDepth = zoffset - zscale * reduce_z,
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.maxDepth = zscale + zoffset,
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});
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}
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}
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}
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if (viewports.empty()) {
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if (viewports.empty()) {
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// Vulkan requires providing at least one viewport.
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// Vulkan requires providing at least one viewport.
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constexpr vk::Viewport empty_viewport = {
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constexpr vk::Viewport empty_viewport = {
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.x = 0.0f,
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.x = -1.0f,
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.y = 0.0f,
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.y = -1.0f,
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.width = 1.0f,
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.width = 1.0f,
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.height = 1.0f,
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.height = 1.0f,
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.minDepth = 0.0f,
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.minDepth = 0.0f,
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@ -76,7 +76,7 @@ private:
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void EliminateFastClear();
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void EliminateFastClear();
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void UpdateDynamicState(const GraphicsPipeline& pipeline);
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void UpdateDynamicState(const GraphicsPipeline& pipeline);
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void UpdateViewportScissorState();
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void UpdateViewportScissorState(const GraphicsPipeline& pipeline);
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bool FilterDraw();
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bool FilterDraw();
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