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@ -523,12 +523,12 @@ static bool Is4ByteExtrqOrInsertq(void* code_address) {
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}
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}
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static bool TryExecuteIllegalInstruction(void* ctx, void* code_address) {
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static bool TryExecuteIllegalInstruction(void* ctx, void* code_address) {
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// We need to decode the instruction to find out what it is. Normally we'd use a fully fleshed out decoder
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// We need to decode the instruction to find out what it is. Normally we'd use a fully fleshed
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// like Zydis, however Zydis does a bunch of stuff that impact performance that we don't care about.
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// out decoder like Zydis, however Zydis does a bunch of stuff that impact performance that we
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// We can get information about the instruction a lot faster by writing a mini decoder here, since we know
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// don't care about. We can get information about the instruction a lot faster by writing a mini
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// it is definitely an extrq or an insertq.
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// decoder here, since we know it is definitely an extrq or an insertq. If for some reason we
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// If for some reason we need to interpret more instructions in the future (I don't see why we would), we can
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// need to interpret more instructions in the future (I don't see why we would), we can revert
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// revert to using Zydis.
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// to using Zydis.
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ZydisMnemonic mnemonic;
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ZydisMnemonic mnemonic;
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u8* bytes = (u8*)code_address;
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u8* bytes = (u8*)code_address;
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if (bytes[0] == 0x66) {
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if (bytes[0] == 0x66) {
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@ -541,13 +541,16 @@ static bool TryExecuteIllegalInstruction(void* ctx, void* code_address) {
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const auto status =
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const auto status =
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Common::Decoder::Instance()->decodeInstruction(instruction, operands, code_address);
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Common::Decoder::Instance()->decodeInstruction(instruction, operands, code_address);
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LOG_ERROR(Core, "Unhandled illegal instruction at code address {}: {}",
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LOG_ERROR(Core, "Unhandled illegal instruction at code address {}: {}",
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fmt::ptr(code_address), ZYAN_SUCCESS(status) ? ZydisMnemonicGetString(instruction.mnemonic) : "Failed to decode");
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fmt::ptr(code_address),
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ZYAN_SUCCESS(status) ? ZydisMnemonicGetString(instruction.mnemonic)
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: "Failed to decode");
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return false;
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return false;
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}
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}
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ASSERT(bytes[1] == 0x0F && bytes[2] == 0x79);
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ASSERT(bytes[1] == 0x0F && bytes[2] == 0x79);
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// Note: It's guaranteed that there's no REX prefix in these instructions checked by Is4ByteExtrqOrInsertq
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// Note: It's guaranteed that there's no REX prefix in these instructions checked by
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// Is4ByteExtrqOrInsertq
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u8 modrm = bytes[3];
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u8 modrm = bytes[3];
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u8 rm = modrm & 0b111;
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u8 rm = modrm & 0b111;
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u8 reg = (modrm >> 3) & 0b111;
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u8 reg = (modrm >> 3) & 0b111;
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@ -583,9 +586,9 @@ static bool TryExecuteIllegalInstruction(void* ctx, void* code_address) {
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// Undefined behavior if length + index is bigger than 64 according to the spec,
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// Undefined behavior if length + index is bigger than 64 according to the spec,
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// we'll warn and continue execution.
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// we'll warn and continue execution.
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LOG_TRACE(Core,
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LOG_TRACE(Core,
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"extrq at {} with length {} and index {} is bigger than 64, "
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"extrq at {} with length {} and index {} is bigger than 64, "
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"undefined behavior",
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"undefined behavior",
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fmt::ptr(code_address), length, index);
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fmt::ptr(code_address), length, index);
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}
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}
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lowQWordDst >>= index;
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lowQWordDst >>= index;
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@ -622,9 +625,9 @@ static bool TryExecuteIllegalInstruction(void* ctx, void* code_address) {
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// Undefined behavior if length + index is bigger than 64 according to the spec,
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// Undefined behavior if length + index is bigger than 64 according to the spec,
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// we'll warn and continue execution.
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// we'll warn and continue execution.
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LOG_TRACE(Core,
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LOG_TRACE(Core,
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"insertq at {} with length {} and index {} is bigger than 64, "
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"insertq at {} with length {} and index {} is bigger than 64, "
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"undefined behavior",
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"undefined behavior",
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fmt::ptr(code_address), length, index);
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fmt::ptr(code_address), length, index);
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}
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}
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lowQWordSrc &= mask;
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lowQWordSrc &= mask;
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@ -647,8 +650,7 @@ static bool TryExecuteIllegalInstruction(void* ctx, void* code_address) {
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#elif defined(ARCH_ARM64)
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#elif defined(ARCH_ARM64)
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// These functions shouldn't be needed for ARM as it will use a JIT so there's no need to patch
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// These functions shouldn't be needed for ARM as it will use a JIT so there's no need to patch
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// instructions.
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// instructions.
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static bool TryExecuteIllegalInstruction(void*, void*, ZydisDecodedInstruction&,
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static bool TryExecuteIllegalInstruction(void*, void*) {
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ZydisDecodedOperand*) {
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return false;
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return false;
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}
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}
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#else
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#else
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@ -704,7 +706,8 @@ static bool PatchesIllegalInstructionHandler(void* context) {
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const auto status =
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const auto status =
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Common::Decoder::Instance()->decodeInstruction(instruction, operands, code_address);
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Common::Decoder::Instance()->decodeInstruction(instruction, operands, code_address);
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LOG_ERROR(Core, "Failed to patch address {:x} -- mnemonic: {}", (u64)code_address,
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LOG_ERROR(Core, "Failed to patch address {:x} -- mnemonic: {}", (u64)code_address,
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ZYAN_SUCCESS(status) ? ZydisMnemonicGetString(instruction.mnemonic) : "Failed to decode");
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ZYAN_SUCCESS(status) ? ZydisMnemonicGetString(instruction.mnemonic)
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: "Failed to decode");
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}
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}
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}
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}
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