From 544ff1dfc5c6afa9056b40534c2bc8731d7e151c Mon Sep 17 00:00:00 2001 From: nickci2002 Date: Wed, 25 Jun 2025 11:43:56 -0400 Subject: [PATCH] Replaced V_CMP_EQ_U64 code to match V_CMP_U32 to test --- .../frontend/translate/translate.h | 2 +- .../frontend/translate/vector_alu.cpp | 47 ++++++------------- 2 files changed, 16 insertions(+), 33 deletions(-) diff --git a/src/shader_recompiler/frontend/translate/translate.h b/src/shader_recompiler/frontend/translate/translate.h index 5be6feedf..f154d16cd 100644 --- a/src/shader_recompiler/frontend/translate/translate.h +++ b/src/shader_recompiler/frontend/translate/translate.h @@ -231,7 +231,7 @@ public: void V_CMP_F32(ConditionOp op, bool set_exec, const GcnInst& inst); void V_CMP_U32(ConditionOp op, bool is_signed, bool set_exec, const GcnInst& inst); void V_CMP_U64(ConditionOp op, bool is_signed, bool set_exec, const GcnInst& inst); - void V_CMP_EQ_U64(NegateMode negate, const GcnInst& inst); + void V_CMP_EQ_U64(ConditionOp op, const GcnInst& inst); void V_CMP_CLASS_F32(const GcnInst& inst); // VOP3a diff --git a/src/shader_recompiler/frontend/translate/vector_alu.cpp b/src/shader_recompiler/frontend/translate/vector_alu.cpp index 58da39e14..857cc84e9 100644 --- a/src/shader_recompiler/frontend/translate/vector_alu.cpp +++ b/src/shader_recompiler/frontend/translate/vector_alu.cpp @@ -328,9 +328,9 @@ void Translator::EmitVectorAlu(const GcnInst& inst) { // V_CMP_{OP8}_U64 case Opcode::V_CMP_EQ_U64: - return V_CMP_EQ_U64(NegateMode::None, inst); + return V_CMP_EQ_U64(ConditionOp::EQ, inst); case Opcode::V_CMP_NE_U64: - return V_CMP_EQ_U64(NegateMode::Result, inst); + return V_CMP_EQ_U64(ConditionOp::LG, inst); case Opcode::V_CMP_CLASS_F32: return V_CMP_CLASS_F32(inst); @@ -1037,42 +1037,25 @@ void Translator::V_CMP_U32(ConditionOp op, bool is_signed, bool set_exec, const // } // } -void Translator::V_CMP_EQ_U64(NegateMode negate, const GcnInst& inst) { - const auto get_src = [&](const InstOperand& operand) { - switch (operand.field) { - case OperandField::VccLo: - return ir.GetVcc(); - case OperandField::ExecLo: - return ir.GetExec(); - case OperandField::ScalarGPR: - return ir.GetThreadBitScalarReg(IR::ScalarReg(operand.code)); - case OperandField::ConstZero: - return ir.Imm1(false); +void Translator::V_CMP_EQ_U64(ConditionOp op, const GcnInst& inst) { + const IR::U64 src0{GetSrc64(inst.src[0])}; + const IR::U64 src1{GetSrc64(inst.src[1])}; + const IR::U1 result = [&] { + switch (op) { + case ConditionOp::EQ: + return ir.IEqual(src0, src1); + case ConditionOp::LG: // NE + return ir.INotEqual(src0, src1); default: - UNREACHABLE(); + UNREACHABLE_MSG("Unsupported V_CMP_EQ_U64 condition operation: {}", u32(op)); } - }; + }(); - const IR::U1 src0{get_src(inst.src[0])}; - auto op = [&inst, this](auto x) { - switch (inst.src[1].field) { - case OperandField::ConstZero: - return ir.LogicalNot(x); - case OperandField::SignedConstIntNeg: - return x; - default: - UNREACHABLE_MSG("unhandled V_CMP_NE_U64 source argument {}", u32(inst.src[1].field)); - } - }; - - auto result = negate == NegateMode::Result ? ir.LogicalNot(op(src0)) : src0; switch (inst.dst[1].field) { case OperandField::VccLo: - ir.SetVcc(result); - break; + return ir.SetVcc(result); case OperandField::ScalarGPR: - ir.SetThreadBitScalarReg(IR::ScalarReg(inst.dst[1].code), result); - break; + return ir.SetThreadBitScalarReg(IR::ScalarReg(inst.dst[1].code), result); default: UNREACHABLE(); }