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graphics_pipeline: More proper masking

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IndecisiveTurtle 2024-09-15 20:48:35 +03:00
parent 9203e28b21
commit 585c81cc95
3 changed files with 24 additions and 3 deletions
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17
src/video_core/amdgpu/liverpool.h
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@ -305,6 +305,13 @@ struct Liverpool {
BitField<20, 3, CompareFunc> stencil_bf_func; BitField<20, 3, CompareFunc> stencil_bf_func;
BitField<30, 1, u32> enable_color_writes_on_depth_fail; BitField<30, 1, u32> enable_color_writes_on_depth_fail;
BitField<31, 1, u32> disable_color_writes_on_depth_pass; BitField<31, 1, u32> disable_color_writes_on_depth_pass;
static constexpr u32 Mask() {
return decltype(stencil_enable)::mask | decltype(depth_enable)::mask |
decltype(depth_write_enable)::mask | decltype(depth_bounds_enable)::mask |
decltype(depth_func)::mask | decltype(backface_enable)::mask |
decltype(stencil_ref_func)::mask | decltype(stencil_bf_func)::mask;
}
}; };
enum class StencilFunc : u32 { enum class StencilFunc : u32 {
@ -334,6 +341,11 @@ struct Liverpool {
BitField<12, 4, StencilFunc> stencil_fail_back; BitField<12, 4, StencilFunc> stencil_fail_back;
BitField<16, 4, StencilFunc> stencil_zpass_back; BitField<16, 4, StencilFunc> stencil_zpass_back;
BitField<20, 4, StencilFunc> stencil_zfail_back; BitField<20, 4, StencilFunc> stencil_zfail_back;
BitField<24, 8, u32> padding;
static constexpr u32 Mask() {
return ~decltype(padding)::mask;
}
}; };
union StencilRefMask { union StencilRefMask {
@ -506,6 +518,11 @@ struct Liverpool {
u32 GetMask(int buf_id) const { u32 GetMask(int buf_id) const {
return (raw >> (buf_id * 4)) & 0xfu; return (raw >> (buf_id * 4)) & 0xfu;
} }
void SetMask(int buf_id, u32 mask) {
raw &= ~(0xf << (buf_id * 4));
raw |= (mask << (buf_id * 4));
}
}; };
struct IndexBufferBase { struct IndexBufferBase {

4
src/video_core/renderer_vulkan/vk_graphics_pipeline.h
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@ -37,7 +37,7 @@ struct GraphicsPipelineKey {
float depth_bias_slope_factor; float depth_bias_slope_factor;
float depth_bias_clamp; float depth_bias_clamp;
u32 depth_bias_enable; u32 depth_bias_enable;
u32 num_samples = 1; u32 num_samples;
Liverpool::StencilControl stencil; Liverpool::StencilControl stencil;
Liverpool::StencilRefMask stencil_ref_front; Liverpool::StencilRefMask stencil_ref_front;
Liverpool::StencilRefMask stencil_ref_back; Liverpool::StencilRefMask stencil_ref_back;
@ -48,7 +48,7 @@ struct GraphicsPipelineKey {
Liverpool::CullMode cull_mode; Liverpool::CullMode cull_mode;
Liverpool::FrontFace front_face; Liverpool::FrontFace front_face;
Liverpool::ClipSpace clip_space; Liverpool::ClipSpace clip_space;
Liverpool::ColorBufferMask cb_shader_mask{}; Liverpool::ColorBufferMask cb_shader_mask;
std::array<Liverpool::BlendControl, Liverpool::NumColorBuffers> blend_controls; std::array<Liverpool::BlendControl, Liverpool::NumColorBuffers> blend_controls;
std::array<vk::ColorComponentFlags, Liverpool::NumColorBuffers> write_masks; std::array<vk::ColorComponentFlags, Liverpool::NumColorBuffers> write_masks;

6
src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
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@ -197,10 +197,13 @@ bool ShouldSkipShader(u64 shader_hash, const char* shader_type) {
} }
bool PipelineCache::RefreshGraphicsKey() { bool PipelineCache::RefreshGraphicsKey() {
std::memset(&graphics_key, 0, sizeof(GraphicsPipelineKey));
auto& regs = liverpool->regs; auto& regs = liverpool->regs;
auto& key = graphics_key; auto& key = graphics_key;
key.depth = regs.depth_control; key.depth = regs.depth_control;
key.depth.raw &= Liverpool::DepthControl::Mask();
key.depth.depth_write_enable.Assign(regs.depth_control.depth_write_enable.Value() && key.depth.depth_write_enable.Assign(regs.depth_control.depth_write_enable.Value() &&
!regs.depth_render_control.depth_clear_enable); !regs.depth_render_control.depth_clear_enable);
key.depth_bounds_min = regs.depth_bounds_min; key.depth_bounds_min = regs.depth_bounds_min;
@ -217,6 +220,7 @@ bool PipelineCache::RefreshGraphicsKey() {
} }
key.depth_bias_clamp = regs.poly_offset.depth_bias; key.depth_bias_clamp = regs.poly_offset.depth_bias;
key.stencil = regs.stencil_control; key.stencil = regs.stencil_control;
key.stencil.raw &= Liverpool::StencilControl::Mask();
key.stencil_ref_front = regs.stencil_ref_front; key.stencil_ref_front = regs.stencil_ref_front;
key.stencil_ref_back = regs.stencil_ref_back; key.stencil_ref_back = regs.stencil_ref_back;
key.prim_type = regs.primitive_type; key.prim_type = regs.primitive_type;
@ -277,7 +281,7 @@ bool PipelineCache::RefreshGraphicsKey() {
key.blend_controls[remapped_cb].enable.Assign(key.blend_controls[remapped_cb].enable && key.blend_controls[remapped_cb].enable.Assign(key.blend_controls[remapped_cb].enable &&
!col_buf.info.blend_bypass); !col_buf.info.blend_bypass);
key.write_masks[remapped_cb] = vk::ColorComponentFlags{regs.color_target_mask.GetMask(cb)}; key.write_masks[remapped_cb] = vk::ColorComponentFlags{regs.color_target_mask.GetMask(cb)};
key.cb_shader_mask = regs.color_shader_mask; key.cb_shader_mask.SetMask(remapped_cb, regs.color_shader_mask.GetMask(cb));
++remapped_cb; ++remapped_cb;
} }