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amdgpu: gpuclock64 in write eop packet
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@ -282,6 +282,13 @@ enum class InterruptSelect : u32 {
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IrqUndocumented = 3,
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IrqUndocumented = 3,
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};
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};
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static u64 GetGpuClock64() {
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auto now = std::chrono::high_resolution_clock::now();
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auto duration = now.time_since_epoch();
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auto ticks = std::chrono::duration_cast<std::chrono::nanoseconds>(duration).count();
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return static_cast<u64>(ticks);
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}
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struct PM4CmdEventWriteEop {
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struct PM4CmdEventWriteEop {
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PM4Type3Header header;
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PM4Type3Header header;
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union {
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union {
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@ -325,6 +332,10 @@ struct PM4CmdEventWriteEop {
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*Address<u64>() = DataQWord();
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*Address<u64>() = DataQWord();
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break;
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break;
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}
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}
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case DataSelect::GpuClock64: {
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*Address<u64>() = GetGpuClock64();
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break;
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}
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case DataSelect::PerfCounter: {
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case DataSelect::PerfCounter: {
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*Address<u64>() = Common::FencedRDTSC();
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*Address<u64>() = Common::FencedRDTSC();
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break;
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break;
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@ -652,13 +663,6 @@ struct PM4CmdReleaseMem {
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return data_lo | u64(data_hi) << 32;
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return data_lo | u64(data_hi) << 32;
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}
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}
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uint64_t GetGpuClock64() const {
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auto now = std::chrono::high_resolution_clock::now();
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auto duration = now.time_since_epoch();
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auto ticks = std::chrono::duration_cast<std::chrono::nanoseconds>(duration).count();
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return static_cast<uint64_t>(ticks);
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}
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void SignalFence(Platform::InterruptId irq_id) const {
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void SignalFence(Platform::InterruptId irq_id) const {
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switch (data_sel.Value()) {
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switch (data_sel.Value()) {
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case DataSelect::Data32Low: {
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case DataSelect::Data32Low: {
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