mirrors/shadPS4
1
0
Fork 0
mirror of https://github.com/shadps4-emu/shadPS4.git synced 2025-07-30 14:04:55 +00:00
Code Issues Packages Projects Releases Wiki Activity

resource_tracking_pass: Back to assert

Browse Source
This commit is contained in:
IndecisiveTurtle 2024-07-30 20:48:00 +03:00
parent a4192dbfd7
commit 5e59147feb
4 changed files with 5 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/shader_recompiler/frontend/translate/translate.cpp
View File

@ -101,11 +101,11 @@ IR::U32F32 Translator::GetSrc(const InstOperand& operand, bool force_flt) {
} }
break; break;
case OperandField::SignedConstIntPos: case OperandField::SignedConstIntPos:
ASSERT(!is_float); ASSERT(!force_flt);
value = ir.Imm32(operand.code - SignedConstIntPosMin + 1); value = ir.Imm32(operand.code - SignedConstIntPosMin + 1);
break; break;
case OperandField::SignedConstIntNeg: case OperandField::SignedConstIntNeg:
ASSERT(!is_float); ASSERT(!force_flt);
value = ir.Imm32(-s32(operand.code) + SignedConstIntNegMin - 1); value = ir.Imm32(-s32(operand.code) + SignedConstIntNegMin - 1);
break; break;
case OperandField::LiteralConst: case OperandField::LiteralConst:

7
src/shader_recompiler/ir/passes/resource_tracking_pass.cpp
View File

@ -483,12 +483,7 @@ void PatchImageInstruction(IR::Block& block, IR::Inst& inst, Info& info, Descrip
const auto tsharp = TrackSharp(tsharp_handle); const auto tsharp = TrackSharp(tsharp_handle);
const auto image = info.ReadUd<AmdGpu::Image>(tsharp.sgpr_base, tsharp.dword_offset); const auto image = info.ReadUd<AmdGpu::Image>(tsharp.sgpr_base, tsharp.dword_offset);
const auto inst_info = inst.Flags<IR::TextureInstInfo>(); const auto inst_info = inst.Flags<IR::TextureInstInfo>();
if (image.GetType() == AmdGpu::ImageType::Invalid) { ASSERT(image.GetType() != AmdGpu::ImageType::Invalid);
IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
inst.ReplaceUsesWith(
ir.CompositeConstruct(ir.Imm32(0.f), ir.Imm32(0.f), ir.Imm32(0.f), ir.Imm32(0.f)));
return;
}
u32 image_binding = descriptors.Add(ImageResource{ u32 image_binding = descriptors.Add(ImageResource{
.sgpr_base = tsharp.sgpr_base, .sgpr_base = tsharp.sgpr_base,
.dword_offset = tsharp.dword_offset, .dword_offset = tsharp.dword_offset,

2
src/video_core/renderer_vulkan/vk_rasterizer.cpp
View File

@ -23,7 +23,7 @@ Rasterizer::Rasterizer(const Instance& instance_, Scheduler& scheduler_,
: instance{instance_}, scheduler{scheduler_}, texture_cache{texture_cache_}, : instance{instance_}, scheduler{scheduler_}, texture_cache{texture_cache_},
liverpool{liverpool_}, memory{Core::Memory::Instance()}, liverpool{liverpool_}, memory{Core::Memory::Instance()},
pipeline_cache{instance, scheduler, liverpool}, pipeline_cache{instance, scheduler, liverpool},
vertex_index_buffer{instance, scheduler, VertexIndexFlags, 4_GB, BufferType::Upload} { vertex_index_buffer{instance, scheduler, VertexIndexFlags, 2_GB, BufferType::Upload} {
if (!Config::nullGpu()) { if (!Config::nullGpu()) {
liverpool->BindRasterizer(this); liverpool->BindRasterizer(this);
} }

2
src/video_core/renderer_vulkan/vk_stream_buffer.cpp
View File

@ -226,7 +226,7 @@ void StreamBuffer::WaitPendingOperations(u64 requested_upper_bound) {
while (requested_upper_bound > wait_bound && wait_cursor < *invalidation_mark) { while (requested_upper_bound > wait_bound && wait_cursor < *invalidation_mark) {
auto& watch = previous_watches[wait_cursor]; auto& watch = previous_watches[wait_cursor];
wait_bound = watch.upper_bound; wait_bound = watch.upper_bound;
// scheduler.Wait(watch.tick); scheduler.Wait(watch.tick);
++wait_cursor; ++wait_cursor;
} }
} }