diff --git a/src/shader_recompiler/ir/reinterpret.h b/src/shader_recompiler/ir/reinterpret.h
index fb6e1efb8..b71bd3803 100644
--- a/src/shader_recompiler/ir/reinterpret.h
+++ b/src/shader_recompiler/ir/reinterpret.h
@@ -82,13 +82,15 @@ inline F32 ApplyWriteNumberConversion(IREmitter& ir, const F32& value,
         const IR::F32 max = ir.Imm32(float(std::numeric_limits<u8>::max()));
         const IR::F32 mul = ir.FPMul(ir.FPClamp(value, ir.Imm32(-1.f), ir.Imm32(1.f)), max);
         const IR::F32 left = ir.FPSub(mul, ir.Imm32(1.f));
-        return ir.BitCast<F32>(U32{ir.FPDiv(left, ir.Imm32(2.f))});
+        const IR::U32 raw = ir.ConvertFToS(32, ir.FPDiv(left, ir.Imm32(2.f)));
+        return ir.BitCast<F32>(raw);
     }
     case AmdGpu::NumberConversion::Sint16ToSnormNz: {
         const IR::F32 max = ir.Imm32(float(std::numeric_limits<u16>::max()));
         const IR::F32 mul = ir.FPMul(ir.FPClamp(value, ir.Imm32(-1.f), ir.Imm32(1.f)), max);
         const IR::F32 left = ir.FPSub(mul, ir.Imm32(1.f));
-        return ir.BitCast<F32>(U32{ir.FPDiv(left, ir.Imm32(2.f))});
+        const IR::U32 raw = ir.ConvertFToS(32, ir.FPDiv(left, ir.Imm32(2.f)));
+        return ir.BitCast<F32>(raw);
     }                                       
     default:
         UNREACHABLE();
diff --git a/src/video_core/amdgpu/types.h b/src/video_core/amdgpu/types.h
index cd4c141cf..381bcd391 100644
--- a/src/video_core/amdgpu/types.h
+++ b/src/video_core/amdgpu/types.h
@@ -197,8 +197,8 @@ enum class NumberConversion : u32 {
     UintToUscaled = 1,
     SintToSscaled = 2,
     UnormToUbnorm = 3,
-    Sint16ToSnormNz = 5,
-    Sint8ToSnormNz = 6,
+    Sint8ToSnormNz = 5,
+    Sint16ToSnormNz = 6,
 };
 
 struct CompMapping {