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https://github.com/shadps4-emu/shadPS4.git
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buffer_cache: Remove per-draw memory barrier
There are already barriers on every buffer upload and shader can only read from page table
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fddded8d20
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6cbb304afc
@ -1036,25 +1036,6 @@ void BufferCache::SynchronizeBuffersInRange(VAddr device_addr, u64 size) {
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});
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}
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void BufferCache::MemoryBarrier() {
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// Vulkan doesn't know which buffer we access in a shader if we use
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// BufferDeviceAddress. We need a full memory barrier.
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// For now, we only read memory using BDA. If we want to write to it,
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// we might need to change this.
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scheduler.EndRendering();
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const auto cmdbuf = scheduler.CommandBuffer();
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vk::MemoryBarrier2 barrier = {
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.srcStageMask = vk::PipelineStageFlagBits2::eTransfer,
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.srcAccessMask = vk::AccessFlagBits2::eMemoryWrite,
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.dstStageMask = vk::PipelineStageFlagBits2::eAllCommands,
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.dstAccessMask = vk::AccessFlagBits2::eMemoryRead,
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};
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cmdbuf.pipelineBarrier2(vk::DependencyInfo{
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.memoryBarrierCount = 1,
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.pMemoryBarriers = &barrier,
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});
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}
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void BufferCache::InlineDataBuffer(Buffer& buffer, VAddr address, const void* value,
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u32 num_bytes) {
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scheduler.EndRendering();
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@ -159,9 +159,6 @@ public:
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/// Synchronizes all buffers neede for DMA.
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void SynchronizeDmaBuffers();
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/// Record memory barrier. Used for buffers when accessed via BDA.
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void MemoryBarrier();
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private:
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template <typename Func>
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void ForEachBufferInRange(VAddr device_addr, u64 size, Func&& func) {
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@ -488,7 +488,6 @@ bool Rasterizer::BindResources(const Pipeline* pipeline) {
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range.upper() - range.lower());
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}
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}
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buffer_cache.MemoryBarrier();
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}
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fault_process_pending |= uses_dma;
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