diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.cpp b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
index 561014a33..3a5f77f29 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
@@ -183,6 +183,7 @@ void DefineEntryPoint(const IR::Program& program, EmitContext& ctx, Id main) {
         ctx.AddCapability(spv::Capability::Float16);
         ctx.AddCapability(spv::Capability::Int16);
     }
+    ctx.AddCapability(spv::Capability::Int64);
     if (info.has_storage_images) {
         ctx.AddCapability(spv::Capability::StorageImageExtendedFormats);
     }
diff --git a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
index 9ce87add2..11527f9a1 100644
--- a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
+++ b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
@@ -86,6 +86,7 @@ void EmitContext::DefineArithmeticTypes() {
     F32[1] = Name(TypeFloat(32), "f32_id");
     S32[1] = Name(TypeSInt(32), "i32_id");
     U32[1] = Name(TypeUInt(32), "u32_id");
+    U64 = Name(TypeUInt(64), "u64_id");
 
     for (u32 i = 2; i <= 4; i++) {
         if (info.uses_fp16) {
diff --git a/src/shader_recompiler/frontend/translate/translate.h b/src/shader_recompiler/frontend/translate/translate.h
index ff6a15e28..39f1543b9 100644
--- a/src/shader_recompiler/frontend/translate/translate.h
+++ b/src/shader_recompiler/frontend/translate/translate.h
@@ -179,6 +179,7 @@ public:
 
     // Vector interpolation
     void V_INTERP_P2_F32(const GcnInst& inst);
+    void V_INTERP_MOV_F32(const GcnInst& inst);
 
     // Data share
     void DS_SWIZZLE_B32(const GcnInst& inst);
diff --git a/src/shader_recompiler/frontend/translate/vector_alu.cpp b/src/shader_recompiler/frontend/translate/vector_alu.cpp
index 67ff7eeae..2d85d720c 100644
--- a/src/shader_recompiler/frontend/translate/vector_alu.cpp
+++ b/src/shader_recompiler/frontend/translate/vector_alu.cpp
@@ -620,12 +620,12 @@ void Translator::V_SUBREV_I32(const GcnInst& inst) {
 }
 
 void Translator::V_MAD_U64_U32(const GcnInst& inst) {
-
     const auto src0 = GetSrc<IR::U32>(inst.src[0]);
     const auto src1 = GetSrc<IR::U32>(inst.src[1]);
     const auto src2 = GetSrc64<IR::U64>(inst.src[2]);
 
-    const IR::U64 mul_result = ir.UConvert(64, ir.IMul(src0, src1));
+    //const IR::U64 mul_result = ir.UConvert(64, ir.IMul(src0, src1));
+    const IR::U64 mul_result = ir.PackUint2x32(ir.CompositeConstruct(ir.IMul(src0, src1), ir.Imm32(0U)));
     const IR::U64 sum_result = ir.IAdd(mul_result, src2);
 
     SetDst64(inst.dst[0], sum_result);
diff --git a/src/shader_recompiler/frontend/translate/vector_interpolation.cpp b/src/shader_recompiler/frontend/translate/vector_interpolation.cpp
index 6fdf94e24..4ff846cf8 100644
--- a/src/shader_recompiler/frontend/translate/vector_interpolation.cpp
+++ b/src/shader_recompiler/frontend/translate/vector_interpolation.cpp
@@ -12,14 +12,23 @@ void Translator::V_INTERP_P2_F32(const GcnInst& inst) {
     ir.SetVectorReg(dst_reg, ir.GetAttribute(attrib, inst.control.vintrp.chan));
 }
 
+void Translator::V_INTERP_MOV_F32(const GcnInst& inst) {
+    const IR::VectorReg dst_reg{inst.dst[0].code};
+    auto& attr = info.ps_inputs.at(inst.control.vintrp.attr);
+    const IR::Attribute attrib{IR::Attribute::Param0 + attr.param_index};
+    ir.SetVectorReg(dst_reg, ir.GetAttribute(attrib, inst.control.vintrp.chan));
+}
+
 void Translator::EmitVectorInterpolation(const GcnInst& inst) {
     switch (inst.opcode) {
     case Opcode::V_INTERP_P1_F32:
         return;
     case Opcode::V_INTERP_P2_F32:
         return V_INTERP_P2_F32(inst);
+    case Opcode::V_INTERP_MOV_F32:
+        return V_INTERP_MOV_F32(inst);
     default:
-        info.translation_failed = true;
+        LogMissingOpcode(inst);
     }
 }