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shader_recompiler: Only track sampler sharp on sample instructions.
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418ceb2382
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@ -445,12 +445,38 @@ IR::Value PatchCubeCoord(IR::IREmitter& ir, const IR::Value& s, const IR::Value&
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}
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}
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void PatchImageSampleInstruction(IR::Block& block, IR::Inst& inst,
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const IR::TextureInstInfo& inst_info, const u32 image_binding,
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const AmdGpu::Image& image) {
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void PatchImageSampleInstruction(IR::Block& block, IR::Inst& inst, Info& info,
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Descriptors& descriptors, const IR::Inst* producer,
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const u32 image_binding, const AmdGpu::Image& image) {
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// Read sampler sharp. This doesn't exist for IMAGE_LOAD/IMAGE_STORE instructions
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const u32 sampler_binding = [&] {
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ASSERT(producer->GetOpcode() == IR::Opcode::CompositeConstructU32x2);
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const IR::Value& handle = producer->Arg(1);
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// Inline sampler resource.
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if (handle.IsImmediate()) {
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LOG_WARNING(Render_Vulkan, "Inline sampler detected");
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return descriptors.Add(SamplerResource{
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.sgpr_base = std::numeric_limits<u32>::max(),
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.dword_offset = 0,
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.inline_sampler = AmdGpu::Sampler{.raw0 = handle.U32()},
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});
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}
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// Normal sampler resource.
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const auto ssharp_handle = handle.InstRecursive();
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const auto& [ssharp_ud, disable_aniso] = TryDisableAnisoLod0(ssharp_handle);
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const auto ssharp = TrackSharp(ssharp_ud);
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return descriptors.Add(SamplerResource{
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.sgpr_base = ssharp.sgpr_base,
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.dword_offset = ssharp.dword_offset,
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.associated_image = image_binding,
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.disable_aniso = disable_aniso,
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});
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}();
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IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
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const IR::U32 handle = ir.Imm32(image_binding);
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const auto inst_info = inst.Flags<IR::TextureInstInfo>();
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const IR::U32 handle = ir.Imm32(image_binding | sampler_binding << 16);
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IR::Inst* body1 = inst.Arg(1).InstRecursive();
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IR::Inst* body2 = inst.Arg(2).InstRecursive();
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@ -629,44 +655,16 @@ void PatchImageInstruction(IR::Block& block, IR::Inst& inst, Info& info, Descrip
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.sgpr_base = tsharp.sgpr_base,
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.dword_offset = tsharp.dword_offset,
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.type = type,
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.nfmt = static_cast<AmdGpu::NumberFormat>(image.GetNumberFmt()),
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.nfmt = image.GetNumberFmt(),
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.is_storage = is_storage,
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.is_depth = bool(inst_info.is_depth),
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.is_atomic = IsImageAtomicInstruction(inst),
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.is_array = bool(inst_info.is_array),
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});
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// Read sampler sharp. This doesn't exist for IMAGE_LOAD/IMAGE_STORE instructions
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const u32 sampler_binding = [&] {
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if (!has_sampler) {
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return 0U;
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}
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const IR::Value& handle = producer->Arg(1);
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// Inline sampler resource.
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if (handle.IsImmediate()) {
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LOG_WARNING(Render_Vulkan, "Inline sampler detected");
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return descriptors.Add(SamplerResource{
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.sgpr_base = std::numeric_limits<u32>::max(),
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.dword_offset = 0,
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.inline_sampler = AmdGpu::Sampler{.raw0 = handle.U32()},
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});
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}
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// Normal sampler resource.
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const auto ssharp_handle = handle.InstRecursive();
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const auto& [ssharp_ud, disable_aniso] = TryDisableAnisoLod0(ssharp_handle);
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const auto ssharp = TrackSharp(ssharp_ud);
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return descriptors.Add(SamplerResource{
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.sgpr_base = ssharp.sgpr_base,
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.dword_offset = ssharp.dword_offset,
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.associated_image = image_binding,
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.disable_aniso = disable_aniso,
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});
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}();
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image_binding |= (sampler_binding << 16);
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// Sample instructions must be resolved into a new instruction using address register data.
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if (inst.GetOpcode() == IR::Opcode::ImageSampleRaw) {
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PatchImageSampleInstruction(block, inst, inst_info, image_binding, image);
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PatchImageSampleInstruction(block, inst, info, descriptors, producer, image_binding, image);
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return;
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}
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