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tile: Do not pad mip height to tile height.

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This commit is contained in:
squidbus 2025-01-21 20:57:45 -08:00
parent bc344e4a52
commit b1e3547ccc
1 changed files with 5 additions and 6 deletions
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11
src/video_core/texture_cache/image_info.cpp
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@ -178,7 +178,6 @@ void ImageInfo::UpdateSize() {
case AmdGpu::TilingMode::Display_Linear: {
std::tie(mip_info.pitch, mip_info.size) =
ImageSizeLinearAligned(mip_w, mip_h, bpp, num_samples);
mip_info.height = mip_h;
break;
}
case AmdGpu::TilingMode::Texture_Volume:
@ -189,11 +188,6 @@ void ImageInfo::UpdateSize() {
case AmdGpu::TilingMode::Texture_MicroTiled: {
std::tie(mip_info.pitch, mip_info.size) =
ImageSizeMicroTiled(mip_w, mip_h, thickness, bpp, num_samples);
mip_info.height = std::max(mip_h, 8u);
if (props.is_block) {
mip_info.pitch = std::max(mip_info.pitch * 4, 32u);
mip_info.height = std::max(mip_info.height * 4, 32u);
}
break;
}
case AmdGpu::TilingMode::Display_MacroTiled:
@ -208,6 +202,11 @@ void ImageInfo::UpdateSize() {
UNREACHABLE();
}
}
mip_info.height = mip_h;
if (props.is_block) {
mip_info.pitch = std::max(mip_info.pitch * 4, 32u);
mip_info.height = std::max(mip_info.height * 4, 32u);
}
mip_info.size *= mip_d;
mip_info.offset = guest_size;
mips_layout.emplace_back(mip_info);