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Implement S_SUB_I32 and flags for S_SUB_U32
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@ -70,8 +70,9 @@ void Translator::EmitScalarAlu(const GcnInst& inst) {
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case Opcode::S_ADDC_U32:
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return S_ADDC_U32(inst);
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case Opcode::S_SUB_U32:
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case Opcode::S_SUB_I32:
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return S_SUB_U32(inst);
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case Opcode::S_SUB_I32:
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return S_SUB_I32(inst);
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case Opcode::S_MIN_U32:
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return S_MIN_U32(inst);
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case Opcode::S_MAX_U32:
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@ -519,8 +520,19 @@ void Translator::S_SUB_U32(const GcnInst& inst) {
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const IR::U32 src0{GetSrc(inst.src[0])};
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const IR::U32 src1{GetSrc(inst.src[1])};
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SetDst(inst.dst[0], ir.ISub(src0, src1));
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// TODO: Carry out
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ir.SetScc(ir.Imm1(false));
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ir.SetScc(ir.IGreaterThan(src1, src0, false));
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}
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void Translator::S_SUB_I32(const GcnInst& inst) {
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const IR::U32 src0{GetSrc(inst.src[0])};
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const IR::U32 src1{GetSrc(inst.src[1])};
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const IR::U32 result = ir.ISub(src0, src1);
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SetDst(inst.dst[0], result);
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const IR::U32 sign_mask = ir.Imm32(1 << 31);
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const IR::U32 sign0 = ir.BitwiseAnd(src0, sign_mask);
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const IR::U32 sign1 = ir.BitwiseAnd(src1, sign_mask);
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const IR::U32 signr = ir.BitwiseAnd(result, sign_mask);
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ir.SetScc(ir.LogicalAnd(ir.INotEqual(sign0, sign1), ir.INotEqual(sign0, signr)));
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}
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void Translator::S_GETPC_B64(u32 pc, const GcnInst& inst) {
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@ -95,6 +95,7 @@ public:
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void S_NOT_B64(const GcnInst& inst);
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void S_BREV_B32(const GcnInst& inst);
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void S_ADD_U32(const GcnInst& inst);
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void S_SUB_I32(const GcnInst& inst);
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void S_SUB_U32(const GcnInst& inst);
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void S_GETPC_B64(u32 pc, const GcnInst& inst);
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void S_ADDC_U32(const GcnInst& inst);
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