diff --git a/src/shader_recompiler/frontend/translate/vector_alu.cpp b/src/shader_recompiler/frontend/translate/vector_alu.cpp
index 6b0df5fde..3a4d25581 100644
--- a/src/shader_recompiler/frontend/translate/vector_alu.cpp
+++ b/src/shader_recompiler/frontend/translate/vector_alu.cpp
@@ -179,6 +179,8 @@ void Translator::EmitVectorAlu(const GcnInst& inst) {
         return V_MUL_F32(inst);
     case Opcode::V_RCP_F32:
         return V_RCP_F32(inst);
+    case Opcode::V_RCP_F64:
+        return V_RCP_F64(inst);
     case Opcode::V_LDEXP_F32:
         return V_LDEXP_F32(inst);
     case Opcode::V_FRACT_F32:
@@ -196,6 +198,8 @@ void Translator::EmitVectorAlu(const GcnInst& inst) {
     case Opcode::V_FMA_F32:
     case Opcode::V_MADAK_F32:
         return V_FMA_F32(inst);
+    case Opcode::V_FMA_F64:
+        return V_FMA_64(inst);
     case Opcode::V_MAX_F32:
         return V_MAX_F32(inst);
     case Opcode::V_ADD_F64:
@@ -543,6 +547,18 @@ void Translator::V_FMA_F32(const GcnInst& inst) {
     SetDst(inst.dst[0], ir.FPFma(src0, src1, src2));
 }
 
+void Translator::V_RCP_F64(const GcnInst& inst) {
+    const IR::F64 src0{GetSrc<IR::F64>(inst.src[0])};
+    SetDst64(inst.dst[0], ir.FPRecip(src0));
+}
+
+void Translator::V_FMA_F64(const GcnInst& inst) {
+    const IR::F64 src0{GetSrc<IR::F64>(inst.src[0])};
+    const IR::F64 src1{GetSrc<IR::F64>(inst.src[1])};
+    const IR::F64 src2{GetSrc<IR::F64>(inst.src[2])};
+    SetDst64(inst.dst[0], ir.FPFma(src0, src1, src2));
+}
+
 void Translator::V_CMP_F32(ConditionOp op, bool set_exec, const GcnInst& inst) {
     const IR::F32 src0{GetSrc<IR::F32>(inst.src[0])};
     const IR::F32 src1{GetSrc<IR::F32>(inst.src[1])};