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Split FindUMsb64 into two 32bit ops
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@ -230,7 +230,17 @@ Id EmitFindUMsb32(EmitContext& ctx, Id value) {
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}
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Id EmitFindUMsb64(EmitContext& ctx, Id value) {
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return ctx.OpFindUMsb(ctx.U64, value);
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// Vulkan restricts some bitwise operations to 32-bit only, so decompose into
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// two 32-bit values and select the correct result.
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const Id unpacked{ctx.OpBitcast(ctx.U32[2], value)};
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const Id hi{ctx.OpCompositeExtract(ctx.U32[1], unpacked, 1U)};
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const Id lo{ctx.OpCompositeExtract(ctx.U32[1], unpacked, 0U)};
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const Id hi_msb{ctx.OpFindUMsb(ctx.U32[1], hi)};
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const Id lo_msb{ctx.OpFindUMsb(ctx.U32[1], lo)};
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const Id found_hi{ctx.OpINotEqual(ctx.U1[1], hi_msb, ctx.ConstU32(u32(-1)))};
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const Id shifted_hi{ctx.OpIAdd(ctx.U32[1], hi_msb, ctx.ConstU32(32u))};
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// value == 0 case is checked in IREmitter
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return ctx.OpSelect(ctx.U32[1], found_hi, shifted_hi, lo_msb);
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}
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Id EmitFindILsb32(EmitContext& ctx, Id value) {
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@ -695,7 +695,7 @@ void Translator::S_FLBIT_I32_B64(const GcnInst& inst) {
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const IR::U32 msb_pos = ir.FindUMsb(src0);
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const IR::U32 pos_from_left = ir.ISub(ir.Imm32(63), msb_pos);
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// Select 0xFFFFFFFF if src0 was 0
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const IR::U1 cond = ir.INotEqual(src0, ir.Imm32(0));
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const IR::U1 cond = ir.INotEqual(src0, ir.Imm64(u64(0u)));
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SetDst(inst.dst[0], IR::U32{ir.Select(cond, pos_from_left, ir.Imm32(~0U))});
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}
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