From ce63e18e5ef20068736fd0e2c2d58eec14fba780 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marcin=20Miko=C5=82ajczyk?= Date: Fri, 30 May 2025 19:05:55 +0100 Subject: [PATCH] Handle immediate inline sampler --- .../backend/spirv/spirv_emit_context.cpp | 7 ++- .../frontend/translate/vector_memory.cpp | 6 ++- src/shader_recompiler/info.h | 12 +++-- src/shader_recompiler/ir/ir_emitter.cpp | 6 +-- src/shader_recompiler/ir/ir_emitter.h | 3 +- src/shader_recompiler/ir/opcodes.inc | 2 +- .../ir/passes/resource_tracking_pass.cpp | 44 +++++++++++++------ 7 files changed, 56 insertions(+), 24 deletions(-) diff --git a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp index 0a8f78f72..028a9fb2e 100644 --- a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp +++ b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp @@ -972,7 +972,12 @@ void EmitContext::DefineImagesAndSamplers() { const Id id{AddGlobalVariable(sampler_pointer_type, spv::StorageClass::UniformConstant)}; Decorate(id, spv::Decoration::Binding, binding.unified++); Decorate(id, spv::Decoration::DescriptorSet, 0U); - Name(id, fmt::format("{}_{}{}", stage, "samp", samp_desc.sharp_idx)); + auto sharp_desc = std::holds_alternative(samp_desc.sampler) + ? fmt::format("sgpr:{}", std::get(samp_desc.sampler)) + : fmt::format("inline:{:#x}:{:#x}", + std::get(samp_desc.sampler).raw0, + std::get(samp_desc.sampler).raw1); + Name(id, fmt::format("{}_{}{}", stage, "samp", sharp_desc)); samplers.push_back(id); interfaces.push_back(id); } diff --git a/src/shader_recompiler/frontend/translate/vector_memory.cpp b/src/shader_recompiler/frontend/translate/vector_memory.cpp index 54e8b8ee8..36a585a1b 100644 --- a/src/shader_recompiler/frontend/translate/vector_memory.cpp +++ b/src/shader_recompiler/frontend/translate/vector_memory.cpp @@ -533,6 +533,9 @@ IR::Value EmitImageSample(IR::IREmitter& ir, const GcnInst& inst, const IR::Scal // binding index. const IR::Value handle = ir.CompositeConstruct(ir.GetScalarReg(tsharp_reg), ir.GetScalarReg(sampler_reg)); + const IR::Value inline_sampler = + ir.CompositeConstruct(ir.GetScalarReg(sampler_reg), ir.GetScalarReg(sampler_reg + 1), + ir.GetScalarReg(sampler_reg + 2), ir.GetScalarReg(sampler_reg + 3)); // Determine how many address registers need to be passed. // The image type is unknown, so add all 4 possible base registers and resolve later. @@ -568,7 +571,8 @@ IR::Value EmitImageSample(IR::IREmitter& ir, const GcnInst& inst, const IR::Scal const IR::Value address4 = get_addr_reg(12); // Issue the placeholder IR instruction. - IR::Value texel = ir.ImageSampleRaw(handle, address1, address2, address3, address4, info); + IR::Value texel = + ir.ImageSampleRaw(handle, address1, address2, address3, address4, inline_sampler, info); if (info.is_depth && !gather) { // For non-gather depth sampling, only return a single value. texel = ir.CompositeExtract(texel, 0); diff --git a/src/shader_recompiler/info.h b/src/shader_recompiler/info.h index f25111350..e729671fa 100644 --- a/src/shader_recompiler/info.h +++ b/src/shader_recompiler/info.h @@ -91,11 +91,15 @@ struct ImageResource { using ImageResourceList = boost::container::small_vector; struct SamplerResource { - u32 sharp_idx; - AmdGpu::Sampler inline_sampler{}; + std::variant sampler; u32 associated_image : 4; u32 disable_aniso : 1; + SamplerResource(u32 sharp_idx, u32 associated_image_, bool disable_aniso_) + : sampler{sharp_idx}, associated_image{associated_image_}, disable_aniso{disable_aniso_} {} + SamplerResource(AmdGpu::Sampler sampler_) + : sampler{sampler_}, associated_image{0}, disable_aniso(0) {} + constexpr AmdGpu::Sampler GetSharp(const Info& info) const noexcept; }; using SamplerResourceList = boost::container::small_vector; @@ -318,7 +322,9 @@ constexpr AmdGpu::Image ImageResource::GetSharp(const Info& info) const noexcept } constexpr AmdGpu::Sampler SamplerResource::GetSharp(const Info& info) const noexcept { - return inline_sampler ? inline_sampler : info.ReadUdSharp(sharp_idx); + return std::holds_alternative(sampler) + ? std::get(sampler) + : info.ReadUdSharp(std::get(sampler)); } constexpr AmdGpu::Image FMaskResource::GetSharp(const Info& info) const noexcept { diff --git a/src/shader_recompiler/ir/ir_emitter.cpp b/src/shader_recompiler/ir/ir_emitter.cpp index 3d7cf71dc..82712c441 100644 --- a/src/shader_recompiler/ir/ir_emitter.cpp +++ b/src/shader_recompiler/ir/ir_emitter.cpp @@ -1964,9 +1964,9 @@ Value IREmitter::ImageAtomicExchange(const Value& handle, const Value& coords, c Value IREmitter::ImageSampleRaw(const Value& handle, const Value& address1, const Value& address2, const Value& address3, const Value& address4, - TextureInstInfo info) { - return Inst(Opcode::ImageSampleRaw, Flags{info}, handle, address1, address2, address3, - address4); + const Value& inline_sampler, TextureInstInfo info) { + return Inst(Opcode::ImageSampleRaw, Flags{info}, handle, address1, address2, address3, address4, + inline_sampler); } Value IREmitter::ImageSampleImplicitLod(const Value& handle, const Value& coords, const F32& bias, diff --git a/src/shader_recompiler/ir/ir_emitter.h b/src/shader_recompiler/ir/ir_emitter.h index 215a35ee9..982c2dee4 100644 --- a/src/shader_recompiler/ir/ir_emitter.h +++ b/src/shader_recompiler/ir/ir_emitter.h @@ -349,7 +349,8 @@ public: [[nodiscard]] Value ImageSampleRaw(const Value& handle, const Value& address1, const Value& address2, const Value& address3, - const Value& address4, TextureInstInfo info); + const Value& address4, const Value& inline_sampler, + TextureInstInfo info); [[nodiscard]] Value ImageSampleImplicitLod(const Value& handle, const Value& body, const F32& bias, const Value& offset, diff --git a/src/shader_recompiler/ir/opcodes.inc b/src/shader_recompiler/ir/opcodes.inc index 1621d2acf..0380cb0e6 100644 --- a/src/shader_recompiler/ir/opcodes.inc +++ b/src/shader_recompiler/ir/opcodes.inc @@ -412,7 +412,7 @@ OPCODE(ConvertU8U32, U8, U32, OPCODE(ConvertU32U8, U32, U8, ) // Image operations -OPCODE(ImageSampleRaw, F32x4, Opaque, F32x4, F32x4, F32x4, F32, ) +OPCODE(ImageSampleRaw, F32x4, Opaque, F32x4, F32x4, F32x4, F32, Opaque, ) OPCODE(ImageSampleImplicitLod, F32x4, Opaque, F32x4, F32, Opaque, ) OPCODE(ImageSampleExplicitLod, F32x4, Opaque, Opaque, F32, Opaque, ) OPCODE(ImageSampleDrefImplicitLod, F32x4, Opaque, Opaque, F32, F32, Opaque, ) diff --git a/src/shader_recompiler/ir/passes/resource_tracking_pass.cpp b/src/shader_recompiler/ir/passes/resource_tracking_pass.cpp index ba96d1034..5d6d66f3a 100644 --- a/src/shader_recompiler/ir/passes/resource_tracking_pass.cpp +++ b/src/shader_recompiler/ir/passes/resource_tracking_pass.cpp @@ -168,7 +168,7 @@ public: u32 Add(const SamplerResource& desc) { const u32 index{Add(sampler_resources, desc, [this, &desc](const auto& existing) { - return desc.sharp_idx == existing.sharp_idx; + return desc.sampler == existing.sampler; })}; return index; } @@ -427,29 +427,45 @@ void PatchImageSharp(IR::Block& block, IR::Inst& inst, Info& info, Descriptors& if (inst.GetOpcode() == IR::Opcode::ImageSampleRaw) { // Read sampler sharp. - const auto [sampler_binding, sampler] = [&] -> std::pair { + const auto sampler_binding = [&] -> u32 { ASSERT(producer->GetOpcode() == IR::Opcode::CompositeConstructU32x2); const IR::Value& handle = producer->Arg(1); // Inline sampler resource. if (handle.IsImmediate()) { LOG_WARNING(Render_Vulkan, "Inline sampler detected"); - const auto inline_sampler = AmdGpu::Sampler{.raw0 = handle.U32()}; - const auto binding = descriptors.Add(SamplerResource{ - .sharp_idx = std::numeric_limits::max(), - .inline_sampler = inline_sampler, - }); - return {binding, inline_sampler}; + const auto inline_sampler_arg = inst.Arg(5).InstRecursive(); + const auto pred = [](const IR::Inst* inst) -> std::optional { + const auto opcode = inst->GetOpcode(); + if (opcode == IR::Opcode::CompositeConstructU32x4) { + return inst; + } + return std::nullopt; + }; + const auto result = IR::BreadthFirstSearch(inline_sampler_arg, pred); + ASSERT_MSG(result, "Unable to find immediate sampler"); + const IR::Inst* inline_producer = result.value(); + ASSERT(inline_producer && + inline_producer->GetOpcode() == IR::Opcode::CompositeConstructU32x4); + + const auto [s1, s2, s3, s4] = + std::tuple{inline_producer->Arg(0), inline_producer->Arg(1), + inline_producer->Arg(2), inline_producer->Arg(3)}; + ASSERT(s1.IsImmediate() && s2.IsImmediate() && s3.IsImmediate() && + s4.IsImmediate()); + const auto inline_sampler = AmdGpu::Sampler{ + .raw0 = u64(s2.U32()) << 32 | u64(s1.U32()), + .raw1 = u64(s4.U32()) << 32 | u64(s3.U32()), + }; + const auto binding = descriptors.Add(SamplerResource{inline_sampler}); + return binding; } // Normal sampler resource. const auto ssharp_handle = handle.InstRecursive(); const auto& [ssharp_ud, disable_aniso] = TryDisableAnisoLod0(ssharp_handle); const auto ssharp = TrackSharp(ssharp_ud, info); - const auto binding = descriptors.Add(SamplerResource{ - .sharp_idx = ssharp, - .associated_image = image_binding, - .disable_aniso = disable_aniso, - }); - return {binding, info.ReadUdSharp(ssharp)}; + const auto binding = + descriptors.Add(SamplerResource{ssharp, image_binding, disable_aniso}); + return binding; }(); // Patch image and sampler handle. inst.SetArg(0, ir.Imm32(image_binding | sampler_binding << 16));