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https://github.com/shadps4-emu/shadPS4.git
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@ -198,14 +198,14 @@ void Translator::V_WRITELANE_B32(const GcnInst& inst) {
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void Translator::DS_APPEND(const GcnInst& inst) {
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void Translator::DS_APPEND(const GcnInst& inst) {
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const u32 inst_offset = inst.control.ds.offset0;
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const u32 inst_offset = inst.control.ds.offset0;
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const IR::U32 gds_offset = ir.IAdd(m0_value, ir.Imm32(inst_offset));
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const IR::U32 gds_offset = ir.IAdd(ir.GetM0(), ir.Imm32(inst_offset));
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const IR::U32 prev = ir.DataAppend(gds_offset);
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const IR::U32 prev = ir.DataAppend(gds_offset);
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SetDst(inst.dst[0], prev);
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SetDst(inst.dst[0], prev);
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}
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}
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void Translator::DS_CONSUME(const GcnInst& inst) {
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void Translator::DS_CONSUME(const GcnInst& inst) {
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const u32 inst_offset = inst.control.ds.offset0;
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const u32 inst_offset = inst.control.ds.offset0;
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const IR::U32 gds_offset = ir.IAdd(m0_value, ir.Imm32(inst_offset));
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const IR::U32 gds_offset = ir.IAdd(ir.GetM0(), ir.Imm32(inst_offset));
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const IR::U32 prev = ir.DataConsume(gds_offset);
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const IR::U32 prev = ir.DataConsume(gds_offset);
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SetDst(inst.dst[0], prev);
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SetDst(inst.dst[0], prev);
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}
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}
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@ -975,8 +975,9 @@ void Translator::V_MBCNT_U32_B32(bool is_low, const GcnInst& inst) {
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inst.src[1].field == OperandField::ConstZero) {
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inst.src[1].field == OperandField::ConstZero) {
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return;
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return;
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}
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}
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// v_mbcnt_hi_u32_b32 v20, exec_hi, 0
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// v_mbcnt_hi_u32_b32 vX, exec_hi, 0
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if (inst.src[0].field == OperandField::ExecHi) {
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if (inst.src[0].field == OperandField::ExecHi &&
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inst.src[1].field == OperandField::ConstZero) {
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return;
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return;
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}
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}
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} else {
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} else {
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@ -641,7 +641,7 @@ void PatchDataRingInstruction(IR::Block& block, IR::Inst& inst, Info& info,
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// M0 must be set by some user data register.
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// M0 must be set by some user data register.
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const IR::Inst* prod = gds_offset.InstRecursive();
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const IR::Inst* prod = gds_offset.InstRecursive();
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const u32 ud_reg = u32(result.value()->Arg(0).ScalarReg());
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const u32 ud_reg = u32(result.value()->Arg(0).ScalarReg());
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u32 m0_val = info.user_data[ud_reg];
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u32 m0_val = info.user_data[ud_reg] >> 16;
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if (prod->GetOpcode() == IR::Opcode::IAdd32) {
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if (prod->GetOpcode() == IR::Opcode::IAdd32) {
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m0_val += prod->Arg(1).U32();
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m0_val += prod->Arg(1).U32();
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}
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}
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@ -465,6 +465,14 @@ Liverpool::Task Liverpool::ProcessGraphics(std::span<const u32> dcb, std::span<c
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case PM4ItOpcode::EventWriteEos: {
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case PM4ItOpcode::EventWriteEos: {
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const auto* event_eos = reinterpret_cast<const PM4CmdEventWriteEos*>(header);
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const auto* event_eos = reinterpret_cast<const PM4CmdEventWriteEos*>(header);
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event_eos->SignalFence();
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event_eos->SignalFence();
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if (event_eos->command == PM4CmdEventWriteEos::Command::GdsStore) {
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ASSERT(event_eos->size == 1);
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if (rasterizer) {
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rasterizer->Finish();
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const u32 value = rasterizer->ReadDataFromGds(event_eos->gds_index);
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*event_eos->Address() = value;
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}
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}
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break;
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break;
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}
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}
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case PM4ItOpcode::EventWriteEop: {
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case PM4ItOpcode::EventWriteEop: {
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@ -513,13 +513,17 @@ struct PM4CmdEventWriteEos {
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}
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}
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void SignalFence() const {
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void SignalFence() const {
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switch (command.Value()) {
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const auto cmd = command.Value();
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switch (cmd) {
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case Command::SingalFence: {
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case Command::SingalFence: {
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*Address() = DataDWord();
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*Address() = DataDWord();
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break;
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break;
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}
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}
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case Command::GdsStore: {
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break;
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}
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default: {
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default: {
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UNREACHABLE();
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UNREACHABLE_MSG("Unknown command {}", u32(cmd));
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}
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}
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}
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}
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}
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}
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@ -16,8 +16,8 @@ namespace VideoCore {
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static constexpr size_t NumVertexBuffers = 32;
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static constexpr size_t NumVertexBuffers = 32;
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static constexpr size_t GdsBufferSize = 64_KB;
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static constexpr size_t GdsBufferSize = 64_KB;
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static constexpr size_t StagingBufferSize = 512_MB;
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static constexpr size_t StagingBufferSize = 1_GB;
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static constexpr size_t UboStreamBufferSize = 64_MB;
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static constexpr size_t UboStreamBufferSize = 128_MB;
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BufferCache::BufferCache(const Vulkan::Instance& instance_, Vulkan::Scheduler& scheduler_,
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BufferCache::BufferCache(const Vulkan::Instance& instance_, Vulkan::Scheduler& scheduler_,
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const AmdGpu::Liverpool* liverpool_, TextureCache& texture_cache_,
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const AmdGpu::Liverpool* liverpool_, TextureCache& texture_cache_,
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@ -26,7 +26,7 @@ BufferCache::BufferCache(const Vulkan::Instance& instance_, Vulkan::Scheduler& s
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texture_cache{texture_cache_}, tracker{tracker_},
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texture_cache{texture_cache_}, tracker{tracker_},
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staging_buffer{instance, scheduler, MemoryUsage::Upload, StagingBufferSize},
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staging_buffer{instance, scheduler, MemoryUsage::Upload, StagingBufferSize},
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stream_buffer{instance, scheduler, MemoryUsage::Stream, UboStreamBufferSize},
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stream_buffer{instance, scheduler, MemoryUsage::Stream, UboStreamBufferSize},
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gds_buffer{instance, scheduler, MemoryUsage::DeviceLocal, 0, AllFlags, GdsBufferSize},
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gds_buffer{instance, scheduler, MemoryUsage::Stream, 0, AllFlags, GdsBufferSize},
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memory_tracker{&tracker} {
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memory_tracker{&tracker} {
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Vulkan::SetObjectName(instance.GetDevice(), gds_buffer.Handle(), "GDS Buffer");
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Vulkan::SetObjectName(instance.GetDevice(), gds_buffer.Handle(), "GDS Buffer");
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@ -240,6 +240,20 @@ void BufferCache::InlineDataToGds(u32 gds_offset, u32 value) {
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ASSERT_MSG(gds_offset % 4 == 0, "GDS offset must be dword aligned");
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ASSERT_MSG(gds_offset % 4 == 0, "GDS offset must be dword aligned");
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scheduler.EndRendering();
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scheduler.EndRendering();
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const auto cmdbuf = scheduler.CommandBuffer();
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const auto cmdbuf = scheduler.CommandBuffer();
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const vk::BufferMemoryBarrier2 buf_barrier = {
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.srcStageMask = vk::PipelineStageFlagBits2::eTransfer,
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.srcAccessMask = vk::AccessFlagBits2::eTransferWrite,
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.dstStageMask = vk::PipelineStageFlagBits2::eAllCommands,
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.dstAccessMask = vk::AccessFlagBits2::eMemoryRead,
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.buffer = gds_buffer.Handle(),
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.offset = gds_offset,
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.size = sizeof(u32),
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};
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cmdbuf.pipelineBarrier2(vk::DependencyInfo{
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.dependencyFlags = vk::DependencyFlagBits::eByRegion,
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.bufferMemoryBarrierCount = 1,
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.pBufferMemoryBarriers = &buf_barrier,
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});
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cmdbuf.updateBuffer(gds_buffer.Handle(), gds_offset, sizeof(u32), &value);
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cmdbuf.updateBuffer(gds_buffer.Handle(), gds_offset, sizeof(u32), &value);
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}
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}
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@ -431,6 +431,9 @@ void GraphicsPipeline::BindResources(const Liverpool::Regs& regs,
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dst_access, vk::PipelineStageFlagBits2::eVertexShader)) {
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dst_access, vk::PipelineStageFlagBits2::eVertexShader)) {
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buffer_barriers.emplace_back(*barrier);
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buffer_barriers.emplace_back(*barrier);
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}
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}
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if (desc.is_written) {
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texture_cache.MarkWritten(address, size);
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}
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}
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}
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set_writes.push_back({
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set_writes.push_back({
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.dstSet = VK_NULL_HANDLE,
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.dstSet = VK_NULL_HANDLE,
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@ -297,8 +297,14 @@ bool PipelineCache::RefreshGraphicsKey() {
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if (stage != Shader::Stage::Vertex && stage != Shader::Stage::Fragment) {
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if (stage != Shader::Stage::Vertex && stage != Shader::Stage::Fragment) {
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return false;
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return false;
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}
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}
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static bool TessMissingLogged = false;
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if (auto* pgm = regs.ProgramForStage(3);
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if (auto* pgm = regs.ProgramForStage(3);
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regs.stage_enable.IsStageEnabled(3) && pgm->Address() != 0) {
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regs.stage_enable.IsStageEnabled(3) && pgm->Address() != 0) {
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if (!TessMissingLogged) {
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LOG_WARNING(Render_Vulkan, "Tess pipeline compilation skipped");
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TessMissingLogged = true;
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}
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return false;
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return false;
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}
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}
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@ -175,6 +175,10 @@ u64 Rasterizer::Flush() {
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return current_tick;
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return current_tick;
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}
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}
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void Rasterizer::Finish() {
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scheduler.Finish();
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}
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void Rasterizer::BeginRendering() {
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void Rasterizer::BeginRendering() {
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const auto& regs = liverpool->regs;
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const auto& regs = liverpool->regs;
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RenderState state;
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RenderState state;
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@ -255,6 +259,13 @@ void Rasterizer::InlineDataToGds(u32 gds_offset, u32 value) {
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buffer_cache.InlineDataToGds(gds_offset, value);
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buffer_cache.InlineDataToGds(gds_offset, value);
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}
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}
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u32 Rasterizer::ReadDataFromGds(u32 gds_offset) {
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auto* gds_buf = buffer_cache.GetGdsBuffer();
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u32 value;
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std::memcpy(&value, gds_buf->mapped_data.data() + gds_offset, sizeof(u32));
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return value;
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}
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void Rasterizer::InvalidateMemory(VAddr addr, u64 size) {
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void Rasterizer::InvalidateMemory(VAddr addr, u64 size) {
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buffer_cache.InvalidateMemory(addr, size);
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buffer_cache.InvalidateMemory(addr, size);
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texture_cache.InvalidateMemory(addr, size);
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texture_cache.InvalidateMemory(addr, size);
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@ -42,12 +42,14 @@ public:
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void ScopedMarkerInsert(const std::string_view& str);
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void ScopedMarkerInsert(const std::string_view& str);
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void InlineDataToGds(u32 gds_offset, u32 value);
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void InlineDataToGds(u32 gds_offset, u32 value);
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u32 ReadDataFromGds(u32 gsd_offset);
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void InvalidateMemory(VAddr addr, u64 size);
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void InvalidateMemory(VAddr addr, u64 size);
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void MapMemory(VAddr addr, u64 size);
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void MapMemory(VAddr addr, u64 size);
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void UnmapMemory(VAddr addr, u64 size);
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void UnmapMemory(VAddr addr, u64 size);
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void CpSync();
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void CpSync();
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u64 Flush();
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u64 Flush();
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void Finish();
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private:
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private:
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void BeginRendering();
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void BeginRendering();
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@ -32,7 +32,6 @@ enum ImageFlagBits : u32 {
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Registered = 1 << 6, ///< True when the image is registered
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Registered = 1 << 6, ///< True when the image is registered
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Picked = 1 << 7, ///< Temporary flag to mark the image as picked
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Picked = 1 << 7, ///< Temporary flag to mark the image as picked
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MetaRegistered = 1 << 8, ///< True when metadata for this surface is known and registered
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MetaRegistered = 1 << 8, ///< True when metadata for this surface is known and registered
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Deleted = 1 << 9, ///< Indicates that images was marked for deletion once frame is done
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};
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};
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DECLARE_ENUM_FLAG_OPERATORS(ImageFlagBits)
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DECLARE_ENUM_FLAG_OPERATORS(ImageFlagBits)
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@ -491,8 +491,6 @@ void TextureCache::DeleteImage(ImageId image_id) {
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ASSERT_MSG(False(image.flags & ImageFlagBits::Tracked), "Image was not untracked");
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ASSERT_MSG(False(image.flags & ImageFlagBits::Tracked), "Image was not untracked");
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ASSERT_MSG(False(image.flags & ImageFlagBits::Registered), "Image was not unregistered");
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ASSERT_MSG(False(image.flags & ImageFlagBits::Registered), "Image was not unregistered");
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image.flags |= ImageFlagBits::Deleted;
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// Remove any registered meta areas.
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// Remove any registered meta areas.
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const auto& meta_info = image.info.meta_info;
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const auto& meta_info = image.info.meta_info;
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if (meta_info.cmask_addr) {
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if (meta_info.cmask_addr) {
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