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shader_recompiler: Constant buffers as integers

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This commit is contained in:
IndecisiveTurtle 2024-09-06 15:30:02 +03:00
parent 1989c19735
commit d2ff0a8a2a
6 changed files with 7 additions and 16 deletions
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4
src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
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@ -133,10 +133,6 @@ Id EmitReadConstBuffer(EmitContext& ctx, u32 handle, Id index) {
return ctx.OpLoad(buffer.data_types->Get(1), ptr); return ctx.OpLoad(buffer.data_types->Get(1), ptr);
} }
Id EmitReadConstBufferU32(EmitContext& ctx, u32 handle, Id index) {
return ctx.OpBitcast(ctx.U32[1], EmitReadConstBuffer(ctx, handle, index));
}
Id EmitReadStepRate(EmitContext& ctx, int rate_idx) { Id EmitReadStepRate(EmitContext& ctx, int rate_idx) {
return ctx.OpLoad( return ctx.OpLoad(
ctx.U32[1], ctx.OpAccessChain(ctx.TypePointer(spv::StorageClass::PushConstant, ctx.U32[1]), ctx.U32[1], ctx.OpAccessChain(ctx.TypePointer(spv::StorageClass::PushConstant, ctx.U32[1]),

1
src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
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@ -64,7 +64,6 @@ void EmitGetGotoVariable(EmitContext& ctx);
void EmitSetScc(EmitContext& ctx); void EmitSetScc(EmitContext& ctx);
Id EmitReadConst(EmitContext& ctx); Id EmitReadConst(EmitContext& ctx);
Id EmitReadConstBuffer(EmitContext& ctx, u32 handle, Id index); Id EmitReadConstBuffer(EmitContext& ctx, u32 handle, Id index);
Id EmitReadConstBufferU32(EmitContext& ctx, u32 handle, Id index);
Id EmitLoadBufferF32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address); Id EmitLoadBufferF32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address);
Id EmitLoadBufferF32x2(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address); Id EmitLoadBufferF32x2(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address);
Id EmitLoadBufferF32x3(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address); Id EmitLoadBufferF32x3(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address);

4
src/shader_recompiler/ir/ir_emitter.cpp
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@ -313,8 +313,8 @@ U32 IREmitter::ReadConst(const Value& base, const U32& offset) {
return Inst<U32>(Opcode::ReadConst, base, offset); return Inst<U32>(Opcode::ReadConst, base, offset);
} }
F32 IREmitter::ReadConstBuffer(const Value& handle, const U32& index) { U32 IREmitter::ReadConstBuffer(const Value& handle, const U32& index) {
return Inst<F32>(Opcode::ReadConstBuffer, handle, index); return Inst<U32>(Opcode::ReadConstBuffer, handle, index);
} }
Value IREmitter::LoadBuffer(int num_dwords, const Value& handle, const Value& address, Value IREmitter::LoadBuffer(int num_dwords, const Value& handle, const Value& address,

2
src/shader_recompiler/ir/ir_emitter.h
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@ -90,7 +90,7 @@ public:
[[nodiscard]] U32 SharedAtomicIMax(const U32& address, const U32& data, bool is_signed); [[nodiscard]] U32 SharedAtomicIMax(const U32& address, const U32& data, bool is_signed);
[[nodiscard]] U32 ReadConst(const Value& base, const U32& offset); [[nodiscard]] U32 ReadConst(const Value& base, const U32& offset);
[[nodiscard]] F32 ReadConstBuffer(const Value& handle, const U32& index); [[nodiscard]] U32 ReadConstBuffer(const Value& handle, const U32& index);
[[nodiscard]] Value LoadBuffer(int num_dwords, const Value& handle, const Value& address, [[nodiscard]] Value LoadBuffer(int num_dwords, const Value& handle, const Value& address,
BufferInstInfo info); BufferInstInfo info);

3
src/shader_recompiler/ir/opcodes.inc
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@ -17,8 +17,7 @@ OPCODE(DiscardCond, Void, U1,
// Constant memory operations // Constant memory operations
OPCODE(ReadConst, U32, U32x2, U32, ) OPCODE(ReadConst, U32, U32x2, U32, )
OPCODE(ReadConstBuffer, F32, Opaque, U32, ) OPCODE(ReadConstBuffer, U32, Opaque, U32, )
OPCODE(ReadConstBufferU32, U32, Opaque, U32, )
// Barriers // Barriers
OPCODE(Barrier, Void, ) OPCODE(Barrier, Void, )

9
src/shader_recompiler/ir/passes/resource_tracking_pass.cpp
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@ -61,7 +61,6 @@ bool IsBufferInstruction(const IR::Inst& inst) {
case IR::Opcode::LoadBufferF32x4: case IR::Opcode::LoadBufferF32x4:
case IR::Opcode::LoadBufferU32: case IR::Opcode::LoadBufferU32:
case IR::Opcode::ReadConstBuffer: case IR::Opcode::ReadConstBuffer:
case IR::Opcode::ReadConstBufferU32:
return true; return true;
default: default:
return IsBufferStore(inst); return IsBufferStore(inst);
@ -73,7 +72,7 @@ bool IsTextureBufferInstruction(const IR::Inst& inst) {
inst.GetOpcode() == IR::Opcode::StoreBufferFormatF32; inst.GetOpcode() == IR::Opcode::StoreBufferFormatF32;
} }
static bool UseFP16(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat num_format) { bool UseFP16(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat num_format) {
switch (num_format) { switch (num_format) {
case AmdGpu::NumberFormat::Float: case AmdGpu::NumberFormat::Float:
switch (data_format) { switch (data_format) {
@ -102,14 +101,13 @@ IR::Type BufferDataType(const IR::Inst& inst, AmdGpu::NumberFormat num_format) {
case IR::Opcode::LoadBufferF32x2: case IR::Opcode::LoadBufferF32x2:
case IR::Opcode::LoadBufferF32x3: case IR::Opcode::LoadBufferF32x3:
case IR::Opcode::LoadBufferF32x4: case IR::Opcode::LoadBufferF32x4:
case IR::Opcode::ReadConstBuffer:
case IR::Opcode::StoreBufferF32: case IR::Opcode::StoreBufferF32:
case IR::Opcode::StoreBufferF32x2: case IR::Opcode::StoreBufferF32x2:
case IR::Opcode::StoreBufferF32x3: case IR::Opcode::StoreBufferF32x3:
case IR::Opcode::StoreBufferF32x4: case IR::Opcode::StoreBufferF32x4:
return IR::Type::F32; return IR::Type::F32;
case IR::Opcode::LoadBufferU32: case IR::Opcode::LoadBufferU32:
case IR::Opcode::ReadConstBufferU32: case IR::Opcode::ReadConstBuffer:
case IR::Opcode::StoreBufferU32: case IR::Opcode::StoreBufferU32:
case IR::Opcode::BufferAtomicIAdd32: case IR::Opcode::BufferAtomicIAdd32:
case IR::Opcode::BufferAtomicSwap32: case IR::Opcode::BufferAtomicSwap32:
@ -399,8 +397,7 @@ void PatchBufferInstruction(IR::Block& block, IR::Inst& inst, Info& info,
ASSERT(!buffer.swizzle_enable && !buffer.add_tid_enable); ASSERT(!buffer.swizzle_enable && !buffer.add_tid_enable);
// Address of constant buffer reads can be calculated at IR emittion time. // Address of constant buffer reads can be calculated at IR emittion time.
if (inst.GetOpcode() == IR::Opcode::ReadConstBuffer || if (inst.GetOpcode() == IR::Opcode::ReadConstBuffer) {
inst.GetOpcode() == IR::Opcode::ReadConstBufferU32) {
return; return;
} }