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video_core: Rework tile manager (#3374)
* video_core: Rework detiling * video_core: Support tiling and macrotile detiling * clang format * image_info: Cleanups * resource: Revert some changes * texture_cache: Fix small error * image_info: Set depth flag on depth promote * buffer_cache: Remove level check * tile_manager: Handle case of staging buffer causing flush * image_info: Add 2D thick array mode * image_info: Add slices to mip size * tile_manager: Set bank swizzle * buffer_cache: Support image copies from DmaData * vk_rasterizer: Accelerate trivial render target copies with compute Before tiling PR compute image copies were done with the following sequence vkCmdCopyImageToBuffer (in SynchronizeBufferFromImage) -> vkCmdDispatch (copy) -> vkCmdCopyBufferToImage (in RefreshImage) With the tiling PR it added extra tiling/detiling steps vkCmdCopyImageToBuffer -> vkCmdDispatch (tiling) -> vkCmdDispatch (copy) -> vkCmdDispatch (detiling) -> vkCmdCopyBufferToImage This is quite a bit of overhead for a simple image copy. This commit tries to detect trivial image copies i.e cs shaders that copy the full source image to all of the destination. So now all this sequence is just a vkCmdCopyImage. How much it triggers depends on the guest * texture_cache: Fix build * image: Copy all subresources with buffer too
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@@ -22,7 +22,7 @@
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#include "common/unique_function.h"
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#include "shader_recompiler/params.h"
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#include "video_core/amdgpu/pixel_format.h"
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#include "video_core/amdgpu/resource.h"
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#include "video_core/amdgpu/tiling.h"
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#include "video_core/amdgpu/types.h"
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namespace Vulkan {
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@@ -426,7 +426,7 @@ struct Liverpool {
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BitField<0, 2, ZFormat> format;
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BitField<2, 2, u32> num_samples;
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BitField<13, 3, u32> tile_split;
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BitField<20, 3, u32> tile_mode_index;
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BitField<20, 3, TileMode> tile_mode_index;
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BitField<23, 4, u32> decompress_on_n_zplanes;
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BitField<27, 1, u32> allow_expclear;
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BitField<28, 1, u32> read_size;
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@@ -502,6 +502,14 @@ struct Liverpool {
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const auto bpe = NumBits() >> 3; // in bytes
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return (depth_slice.tile_max + 1) * 64 * bpe * NumSamples();
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}
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TileMode GetTileMode() const {
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return z_info.tile_mode_index.Value();
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}
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bool IsTiled() const {
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return GetTileMode() != TileMode::DisplayLinearAligned;
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}
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};
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enum class ClipSpace : u32 {
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@@ -888,7 +896,7 @@ struct Liverpool {
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u32 u32all;
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} info;
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union Color0Attrib {
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BitField<0, 5, TilingMode> tile_mode_index;
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BitField<0, 5, TileMode> tile_mode_index;
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BitField<5, 5, u32> fmask_tile_mode_index;
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BitField<10, 2, u32> fmask_bank_height;
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BitField<12, 3, u32> num_samples_log2;
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@@ -949,13 +957,13 @@ struct Liverpool {
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return slice_size;
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}
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TilingMode GetTilingMode() const {
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return info.linear_general ? TilingMode::Display_Linear
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TileMode GetTileMode() const {
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return info.linear_general ? TileMode::DisplayLinearAligned
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: attrib.tile_mode_index.Value();
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}
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bool IsTiled() const {
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return GetTilingMode() != TilingMode::Display_Linear;
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return GetTileMode() != TileMode::DisplayLinearAligned;
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}
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[[nodiscard]] DataFormat GetDataFmt() const {
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