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https://github.com/shadps4-emu/shadPS4.git
synced 2025-08-03 16:02:26 +00:00
add S_XOR_B32
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parent
68e2ca15b4
commit
dc6fd70130
@ -35,6 +35,8 @@ void Translator::EmitScalarAlu(const GcnInst& inst) {
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return S_OR_B64(NegateMode::Result, true, inst);
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return S_OR_B64(NegateMode::Result, true, inst);
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case Opcode::S_ORN2_B64:
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case Opcode::S_ORN2_B64:
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return S_OR_B64(NegateMode::Src1, false, inst);
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return S_OR_B64(NegateMode::Src1, false, inst);
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case Opcode::S_XOR_B32:
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return S_OR_B32(inst, true);
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case Opcode::S_AND_B64:
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case Opcode::S_AND_B64:
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return S_AND_B64(NegateMode::None, inst);
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return S_AND_B64(NegateMode::None, inst);
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case Opcode::S_NAND_B64:
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case Opcode::S_NAND_B64:
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@ -50,7 +52,7 @@ void Translator::EmitScalarAlu(const GcnInst& inst) {
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case Opcode::S_ASHR_I32:
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case Opcode::S_ASHR_I32:
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return S_ASHR_I32(inst);
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return S_ASHR_I32(inst);
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case Opcode::S_OR_B32:
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case Opcode::S_OR_B32:
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return S_OR_B32(inst);
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return S_OR_B32(inst, false);
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case Opcode::S_LSHL_B32:
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case Opcode::S_LSHL_B32:
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return S_LSHL_B32(inst);
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return S_LSHL_B32(inst);
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case Opcode::S_LSHR_B32:
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case Opcode::S_LSHR_B32:
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@ -393,10 +395,16 @@ void Translator::S_ASHR_I32(const GcnInst& inst) {
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ir.SetScc(ir.INotEqual(result, ir.Imm32(0)));
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ir.SetScc(ir.INotEqual(result, ir.Imm32(0)));
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}
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}
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void Translator::S_OR_B32(const GcnInst& inst) {
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void Translator::S_OR_B32(const GcnInst& inst, bool is_xor) {
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const IR::U32 src0{GetSrc(inst.src[0])};
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const IR::U32 src0{GetSrc(inst.src[0])};
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const IR::U32 src1{GetSrc(inst.src[1])};
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const IR::U32 src1{GetSrc(inst.src[1])};
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const IR::U32 result{ir.BitwiseOr(src0, src1)};
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IR::U32 result;
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if (is_xor) {
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result = ir.BitwiseXor(src0, src1);
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} else {
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result = ir.BitwiseOr(src0, src1);
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}
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SetDst(inst.dst[0], result);
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SetDst(inst.dst[0], result);
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ir.SetScc(ir.INotEqual(result, ir.Imm32(0)));
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ir.SetScc(ir.INotEqual(result, ir.Imm32(0)));
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}
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}
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@ -86,7 +86,7 @@ public:
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void S_ADD_I32(const GcnInst& inst);
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void S_ADD_I32(const GcnInst& inst);
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void S_AND_B32(const GcnInst& inst);
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void S_AND_B32(const GcnInst& inst);
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void S_ASHR_I32(const GcnInst& inst);
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void S_ASHR_I32(const GcnInst& inst);
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void S_OR_B32(const GcnInst& inst);
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void S_OR_B32(const GcnInst& inst, bool is_xor);
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void S_LSHR_B32(const GcnInst& inst);
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void S_LSHR_B32(const GcnInst& inst);
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void S_CSELECT_B32(const GcnInst& inst);
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void S_CSELECT_B32(const GcnInst& inst);
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void S_CSELECT_B64(const GcnInst& inst);
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void S_CSELECT_B64(const GcnInst& inst);
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