diff --git a/src/shader_recompiler/ir/passes/lower_buffer_format_to_raw.cpp b/src/shader_recompiler/ir/passes/lower_buffer_format_to_raw.cpp
index dd22a6c99..d54c2daaa 100644
--- a/src/shader_recompiler/ir/passes/lower_buffer_format_to_raw.cpp
+++ b/src/shader_recompiler/ir/passes/lower_buffer_format_to_raw.cpp
@@ -207,8 +207,8 @@ static void LowerBufferFormatInst(IR::Block& block, IR::Inst& inst, Info& info)
                        ? AmdGpu::RemapSwizzle(flags.inst_data_fmt.Value(), AmdGpu::IdentityMapping)
                        : buffer.DstSelect(),
         .num_conversion = is_inst_typed 
-                            ? AmdGpu::MapNumberConversion(flags.inst_num_fmt.Value(), flags.inst_data_fmt.Value())
-                                        : buffer.GetNumberConversion(),
+                              ? AmdGpu::MapNumberConversion(flags.inst_num_fmt.Value(), flags.inst_data_fmt.Value())
+                              : buffer.GetNumberConversion(),
         .num_components = AmdGpu::NumComponents(data_format),
     };
 
diff --git a/src/shader_recompiler/ir/reinterpret.h b/src/shader_recompiler/ir/reinterpret.h
index 5101550ab..a3a6157b6 100644
--- a/src/shader_recompiler/ir/reinterpret.h
+++ b/src/shader_recompiler/ir/reinterpret.h
@@ -35,18 +35,16 @@ inline F32 ApplyReadNumberConversion(IREmitter& ir, const F32& value,
         // Convert 0...1 to -1...1
         return ir.FPSub(ir.FPMul(value, ir.Imm32(2.f)), ir.Imm32(1.f));
     case AmdGpu::NumberConversion::Sint8ToSnormNz: {
+        const IR::U32 additon = ir.IAdd(ir.IMul(ir.BitCast<U32>(value), ir.Imm32(2)), ir.Imm32(1));
+        const IR::F32 left = ir.ConvertSToF(32, 32, additon);
         const IR::F32 max = ir.Imm32(float(std::numeric_limits<u8>::max()));
-        const IR::F32 mul = ir.FPMul(ir.FPClamp(value, ir.Imm32(-1.f), ir.Imm32(1.f)), max);
-        const IR::F32 left = ir.FPSub(mul, ir.Imm32(1.f));
-        const IR::U32 raw = ir.ConvertFToS(32, ir.FPDiv(left, ir.Imm32(2.f)));
-        return ir.BitCast<F32>(raw);
+        return ir.FPDiv(left, max);
     }
     case AmdGpu::NumberConversion::Sint16ToSnormNz: {
+        const IR::U32 additon = ir.IAdd(ir.IMul(ir.BitCast<U32>(value), ir.Imm32(2)), ir.Imm32(1));
+        const IR::F32 left = ir.ConvertSToF(32, 32, additon);
         const IR::F32 max = ir.Imm32(float(std::numeric_limits<u16>::max()));
-        const IR::F32 mul = ir.FPMul(ir.FPClamp(value, ir.Imm32(-1.f), ir.Imm32(1.f)), max);
-        const IR::F32 left = ir.FPSub(mul, ir.Imm32(1.f));
-        const IR::U32 raw = ir.ConvertFToS(32, ir.FPDiv(left, ir.Imm32(2.f)));
-        return ir.BitCast<F32>(raw);
+        return ir.FPDiv(left, max);
     }                 
     default:
         UNREACHABLE();