mirror of
https://github.com/shadps4-emu/shadPS4.git
synced 2025-07-31 14:35:19 +00:00
shader_recompiler: Fix PackDouble2x32/UnpackDouble2x32 type.
This commit is contained in:
parent
127c442bbc
commit
e1ff2dc231
@ -93,7 +93,7 @@ Id EmitPackDouble2x32(EmitContext& ctx, Id value) {
|
||||
}
|
||||
|
||||
Id EmitUnpackDouble2x32(EmitContext& ctx, Id value) {
|
||||
return ctx.OpBitcast(ctx.F32[2], value);
|
||||
return ctx.OpBitcast(ctx.U32[2], value);
|
||||
}
|
||||
|
||||
Id EmitPackUnorm2x16(EmitContext& ctx, Id value) {
|
||||
|
@ -447,8 +447,8 @@ void Translator::SetDst64(const InstOperand& operand, const IR::U64F64& value_ra
|
||||
|
||||
const IR::Value unpacked{is_float ? ir.UnpackDouble2x32(IR::F64{value_untyped})
|
||||
: ir.UnpackUint2x32(IR::U64{value_untyped})};
|
||||
const IR::U32F32 lo{ir.CompositeExtract(unpacked, 0U)};
|
||||
const IR::U32F32 hi{ir.CompositeExtract(unpacked, 1U)};
|
||||
const IR::U32 lo{ir.CompositeExtract(unpacked, 0U)};
|
||||
const IR::U32 hi{ir.CompositeExtract(unpacked, 1U)};
|
||||
switch (operand.field) {
|
||||
case OperandField::ScalarGPR:
|
||||
ir.SetScalarReg(IR::ScalarReg(operand.code + 1), hi);
|
||||
|
@ -196,8 +196,8 @@ OPCODE(BitCastF32U32, F32, U32,
|
||||
|
||||
OPCODE(PackUint2x32, U64, U32x2, )
|
||||
OPCODE(UnpackUint2x32, U32x2, U64, )
|
||||
OPCODE(PackDouble2x32, F64, F32x2, )
|
||||
OPCODE(UnpackDouble2x32, F32x2, F64, )
|
||||
OPCODE(PackDouble2x32, F64, U32x2, )
|
||||
OPCODE(UnpackDouble2x32, U32x2, F64, )
|
||||
|
||||
OPCODE(PackUnorm2x16, U32, F32x2, )
|
||||
OPCODE(UnpackUnorm2x16, F32x2, U32, )
|
||||
|
Loading…
Reference in New Issue
Block a user