image_view: Attempt to apply storage swizzle on format

src/common/logging/backend.cpp

@@ -207,6 +207,7 @@ public:
             message_queue.EmplaceWait(entry);
         } else {
             ForEachBackend([&entry](auto& backend) { backend.Write(entry); });
+            std::fflush(stdout);
         }
     }
 

src/core/libraries/gnmdriver/gnmdriver.cpp

@@ -957,7 +957,7 @@ int PS4_SYSV_ABI sceGnmGetGpuBlockStatus() {
 }
 
 int PS4_SYSV_ABI sceGnmGetGpuCoreClockFrequency() {
-    LOG_ERROR(Lib_GnmDriver, "(STUBBED) called");
+    LOG_DEBUG(Lib_GnmDriver, "(STUBBED) called");
     return ORBIS_OK;
 }
 

src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp

@@ -149,6 +149,9 @@ Id EmitGetAttribute(EmitContext& ctx, IR::Attribute attr, u32 comp) {
                 // Attribute is disabled or varying component is not written
                 return ctx.ConstF32(comp == 3 ? 1.0f : 0.0f);
             }
+            if (param.is_default) {
+                return ctx.OpCompositeExtract(param.component_type, param.id, comp);
+            }
 
             if (param.num_components > 1) {
                 const Id pointer{
@@ -208,7 +211,7 @@ Id EmitGetAttributeU32(EmitContext& ctx, IR::Attribute attr, u32 comp) {
 
 void EmitSetAttribute(EmitContext& ctx, IR::Attribute attr, Id value, u32 element) {
     const Id pointer{OutputAttrPointer(ctx, attr, element)};
-    ctx.OpStore(pointer, value);
+    ctx.OpStore(pointer, ctx.OpBitcast(ctx.F32[1], value));
 }
 
 Id EmitLoadBufferU32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address) {

src/shader_recompiler/backend/spirv/spirv_emit_context.cpp

@@ -205,7 +205,7 @@ void EmitContext::DefineInputs(const Info& info) {
                                                                                              : 1;
                 // Note that we pass index rather than Id
                 input_params[input.binding] = {
-                    rate_idx, input_u32, U32[1], input.num_components, input.instance_data_buf,
+                    rate_idx, input_u32, U32[1], input.num_components, false, input.instance_data_buf,
                 };
             } else {
                 Id id{DefineInput(type, input.binding)};
@@ -232,8 +232,8 @@ void EmitContext::DefineInputs(const Info& info) {
         for (const auto& input : info.ps_inputs) {
             const u32 semantic = input.param_index;
             if (input.is_default) {
-                input_params[semantic] = {MakeDefaultValue(*this, input.default_value), input_f32,
+                input_params[semantic] = {MakeDefaultValue(*this, input.default_value), F32[1],
-                                          F32[1]};
+                                          F32[1], 4, true};
                 continue;
             }
             const IR::Attribute param{IR::Attribute::Param0 + input.param_index};

src/shader_recompiler/backend/spirv/spirv_emit_context.h

@@ -219,6 +219,7 @@ public:
         Id pointer_type;
         Id component_type;
         u32 num_components;
+        bool is_default{};
         s32 buffer_handle{-1};
     };
     std::array<SpirvAttribute, 32> input_params{};

src/video_core/renderer_vulkan/liverpool_to_vk.cpp

@@ -351,7 +351,7 @@ vk::Format SurfaceFormat(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat nu
     }
     if (data_format == AmdGpu::DataFormat::Format8_8_8_8 &&
         num_format == AmdGpu::NumberFormat::Unorm) {
-        return vk::Format::eB8G8R8A8Unorm;
+        return vk::Format::eR8G8B8A8Unorm;
     }
     if (data_format == AmdGpu::DataFormat::Format8_8_8_8 &&
         num_format == AmdGpu::NumberFormat::Srgb) {

src/video_core/renderer_vulkan/vk_rasterizer.cpp

@@ -50,15 +50,6 @@ void Rasterizer::Draw(bool is_indexed, u32 index_offset) {
         UNREACHABLE();
     }
 
-    scheduler.EndRendering();
-    const vk::MemoryBarrier barrier = {
-        .srcAccessMask = vk::AccessFlagBits::eMemoryRead | vk::AccessFlagBits::eMemoryWrite,
-        .dstAccessMask = vk::AccessFlagBits::eMemoryRead | vk::AccessFlagBits::eMemoryWrite,
-    };
-    cmdbuf.pipelineBarrier(vk::PipelineStageFlagBits::eAllCommands,
-                           vk::PipelineStageFlagBits::eAllCommands,
-                           vk::DependencyFlagBits::eByRegion, barrier, {}, {});
-
     BeginRendering();
     UpdateDynamicState(*pipeline);
 
@@ -100,15 +91,6 @@ void Rasterizer::DispatchDirect() {
         UNREACHABLE();
     }
 
-    scheduler.EndRendering();
-    const vk::MemoryBarrier barrier = {
-        .srcAccessMask = vk::AccessFlagBits::eMemoryRead | vk::AccessFlagBits::eMemoryWrite,
-        .dstAccessMask = vk::AccessFlagBits::eMemoryRead | vk::AccessFlagBits::eMemoryWrite,
-    };
-    cmdbuf.pipelineBarrier(vk::PipelineStageFlagBits::eAllCommands,
-                           vk::PipelineStageFlagBits::eAllCommands,
-                           vk::DependencyFlagBits::eByRegion, barrier, {}, {});
-
     cmdbuf.bindPipeline(vk::PipelineBindPoint::eCompute, pipeline->Handle());
     cmdbuf.dispatch(cs_program.dim_x, cs_program.dim_y, cs_program.dim_z);
 }

src/video_core/texture_cache/image_view.cpp

@@ -48,12 +48,19 @@ vk::ComponentSwizzle ConvertComponentSwizzle(u32 dst_sel) {
 }
 
 bool IsIdentityMapping(u32 dst_sel, u32 num_components) {
-    return (num_components == 1 && dst_sel == 0b100) ||
+    return (num_components == 1 && (dst_sel == 0b100 || dst_sel == 0b001000000100)) ||
-           (num_components == 2 && dst_sel == 0b101100) ||
+           (num_components == 2 && (dst_sel == 0b101100 || dst_sel == 0b001000101100)) ||
-           (num_components == 3 && dst_sel == 0b110101100) ||
+           (num_components == 3 && (dst_sel == 0b110101100 || dst_sel == 0b001110101100)) ||
            (num_components == 4 && dst_sel == 0b111110101100);
 }
 
+vk::Format TrySwizzleFormat(vk::Format format, u32 dst_sel) {
+    if (format == vk::Format::eR8G8B8A8Unorm && dst_sel == 0b111100101110) {
+        return vk::Format::eB8G8R8A8Unorm;
+    }
+    return format;
+}
+
 ImageViewInfo::ImageViewInfo(const AmdGpu::Image& image, bool is_storage) noexcept
     : is_storage{is_storage} {
     type = ConvertImageViewType(image.GetType());
@@ -68,13 +75,15 @@ ImageViewInfo::ImageViewInfo(const AmdGpu::Image& image, bool is_storage) noexce
     mapping.a = ConvertComponentSwizzle(image.dst_sel_w);
     // Check for unfortunate case of storage images being swizzled
     const u32 num_comps = AmdGpu::NumComponents(image.GetDataFmt());
-    if (is_storage && !IsIdentityMapping(image.DstSelect(), num_comps)) {
+    const u32 dst_sel = image.DstSelect();
-        if (num_comps == 4) {
+    if (is_storage && !IsIdentityMapping(dst_sel, num_comps)) {
-            printf("bad\n");
+        mapping = vk::ComponentMapping{};
+        if (auto new_format = TrySwizzleFormat(format, dst_sel); new_format != format) {
+            format = new_format;
+            return;
         }
         LOG_ERROR(Render_Vulkan, "Storage image (num_comps = {}) requires swizzling {}", num_comps,
                   image.DstSelectName());
-        mapping = vk::ComponentMapping{};
     }
 }
 

src/video_core/texture_cache/texture_cache.cpp

@@ -207,7 +207,7 @@ ImageView& TextureCache::FindTexture(const ImageInfo& info, const ImageViewInfo&
         view_info_tmp.range.extent.levels > image.info.resources.levels ||
         view_info_tmp.range.extent.layers > image.info.resources.layers) {
 
-        LOG_ERROR(Render_Vulkan,
+        LOG_DEBUG(Render_Vulkan,
                   "Subresource range ({}~{},{}~{}) exceeds base image extents ({},{})",
                   view_info_tmp.range.base.level, view_info_tmp.range.extent.levels,
                   view_info_tmp.range.base.layer, view_info_tmp.range.extent.layers,