diff --git a/src/shader_recompiler/frontend/translate/data_share.cpp b/src/shader_recompiler/frontend/translate/data_share.cpp
index 9685ee352..2f5932f80 100644
--- a/src/shader_recompiler/frontend/translate/data_share.cpp
+++ b/src/shader_recompiler/frontend/translate/data_share.cpp
@@ -158,13 +158,12 @@ void Translator::DS_WRITE(int bit_size, bool is_signed, bool is_pair, bool strid
 void Translator::DS_SWIZZLE_B32(const GcnInst& inst) {
     const u8 offset0 = inst.control.ds.offset0;
     const u8 offset1 = inst.control.ds.offset1;
-    const IR::U32 src{GetSrc(inst.src[1])};
+    const IR::U32 src{GetSrc(inst.src[0])};
     // ASSERT(offset1 & 0x80);
     const IR::U32 lane_id = ir.LaneId();
     const IR::U32 id_in_group = ir.BitwiseAnd(lane_id, ir.Imm32(0b11));
     const IR::U32 base = ir.ShiftLeftLogical(id_in_group, ir.Imm32(1));
-    const IR::U32 index =
-        ir.IAdd(lane_id, ir.BitFieldExtract(ir.Imm32(offset0), base, ir.Imm32(2)));
+    const IR::U32 index = ir.BitFieldExtract(ir.Imm32(offset0), base, ir.Imm32(2));
     SetDst(inst.dst[0], ir.QuadShuffle(src, index));
 }
 
diff --git a/src/shader_recompiler/info.h b/src/shader_recompiler/info.h
index f9cbacaf2..c7ae2a1e5 100644
--- a/src/shader_recompiler/info.h
+++ b/src/shader_recompiler/info.h
@@ -17,6 +17,7 @@
 #include "shader_recompiler/ir/type.h"
 #include "shader_recompiler/params.h"
 #include "shader_recompiler/runtime_info.h"
+#include "video_core/amdgpu/liverpool.h"
 #include "video_core/amdgpu/resource.h"
 
 namespace Shader {
@@ -251,10 +252,10 @@ struct Info {
         bnd.user_data += ud_mask.NumRegs();
     }
 
-    [[nodiscard]] std::pair<u32, u32> GetDrawOffsets() const {
-        u32 vertex_offset = 0;
+    [[nodiscard]] std::pair<u32, u32> GetDrawOffsets(const AmdGpu::Liverpool::Regs& regs) const {
+        u32 vertex_offset = regs.index_offset;
         u32 instance_offset = 0;
-        if (vertex_offset_sgpr != -1) {
+        if (vertex_offset == 0 && vertex_offset_sgpr != -1) {
             vertex_offset = user_data[vertex_offset_sgpr];
         }
         if (instance_offset_sgpr != -1) {
diff --git a/src/video_core/amdgpu/liverpool.h b/src/video_core/amdgpu/liverpool.h
index 0ef9397b0..2b2f2c00a 100644
--- a/src/video_core/amdgpu/liverpool.h
+++ b/src/video_core/amdgpu/liverpool.h
@@ -1111,7 +1111,8 @@ struct Liverpool {
             INSERT_PADDING_WORDS(2);
             std::array<ViewportScissor, NumViewports> viewport_scissors;
             std::array<ViewportDepth, NumViewports> viewport_depths;
-            INSERT_PADDING_WORDS(0xA103 - 0xA0D4);
+            INSERT_PADDING_WORDS(0xA102 - 0xA0D4);
+            u32 index_offset;
             u32 primitive_restart_index;
             INSERT_PADDING_WORDS(1);
             BlendConstants blend_constants;
@@ -1380,6 +1381,7 @@ static_assert(GFX6_3D_REG_INDEX(color_target_mask) == 0xA08E);
 static_assert(GFX6_3D_REG_INDEX(color_shader_mask) == 0xA08F);
 static_assert(GFX6_3D_REG_INDEX(generic_scissor) == 0xA090);
 static_assert(GFX6_3D_REG_INDEX(viewport_scissors) == 0xA094);
+static_assert(GFX6_3D_REG_INDEX(index_offset) == 0xA102);
 static_assert(GFX6_3D_REG_INDEX(primitive_restart_index) == 0xA103);
 static_assert(GFX6_3D_REG_INDEX(stencil_control) == 0xA10B);
 static_assert(GFX6_3D_REG_INDEX(viewports) == 0xA10F);
diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
index e66d12517..a6fc872d9 100644
--- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp
+++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
@@ -200,7 +200,7 @@ void Rasterizer::Draw(bool is_indexed, u32 index_offset) {
     BeginRendering(*pipeline, state);
     UpdateDynamicState(*pipeline);
 
-    const auto [vertex_offset, instance_offset] = vs_info.GetDrawOffsets();
+    const auto [vertex_offset, instance_offset] = vs_info.GetDrawOffsets(regs);
 
     const auto cmdbuf = scheduler.CommandBuffer();
     cmdbuf.bindPipeline(vk::PipelineBindPoint::eGraphics, pipeline->Handle());