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consider 3d depth alignment in size calculations

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This commit is contained in:
psucien 2024-12-22 17:46:17 +01:00
parent 4a589cc141
commit eca711b9b4
2 changed files with 4 additions and 10 deletions
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8
src/video_core/texture_cache/image_info.cpp
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@ -359,16 +359,16 @@ void ImageInfo::UpdateSize() {
mip_d = std::bit_ceil(mip_d); mip_d = std::bit_ceil(mip_d);
} }
auto size_mode_adj = switch (tiling_mode) {
tiling_idx == 0x13 ? AmdGpu::TilingMode::Texture_MicroTiled : tiling_mode;
switch (size_mode_adj) {
case AmdGpu::TilingMode::Display_Linear: { case AmdGpu::TilingMode::Display_Linear: {
std::tie(mip_info.pitch, mip_info.size) = std::tie(mip_info.pitch, mip_info.size) =
ImageSizeLinearAligned(mip_w, mip_h, bpp, num_samples); ImageSizeLinearAligned(mip_w, mip_h, bpp, num_samples);
mip_info.height = mip_h; mip_info.height = mip_h;
break; break;
} }
case AmdGpu::TilingMode::Texture_Volume:
mip_d += (-mip_d) & 3u;
[[fallthrough]];
case AmdGpu::TilingMode::Texture_MicroTiled: { case AmdGpu::TilingMode::Texture_MicroTiled: {
std::tie(mip_info.pitch, mip_info.size) = std::tie(mip_info.pitch, mip_info.size) =
ImageSizeMicroTiled(mip_w, mip_h, bpp, num_samples); ImageSizeMicroTiled(mip_w, mip_h, bpp, num_samples);

6
src/video_core/texture_cache/tile_manager.h
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@ -11,12 +11,6 @@ namespace VideoCore {
class TextureCache; class TextureCache;
/// Converts tiled texture data to linear format.
void ConvertTileToLinear(u8* dst, const u8* src, u32 width, u32 height, bool neo);
/// Converts image format to the one used internally by detiler.
vk::Format DemoteImageFormatForDetiling(vk::Format format);
enum DetilerType : u32 { enum DetilerType : u32 {
Micro8x1, Micro8x1,
Micro8x2, Micro8x2,