9 Commits

Author	SHA1	Message	Date
TheTurtle	22a2741ea0	shader_recompilers: Improvements to SSA phi generation and lane instruction elimination (#1667) ... * shader_recompiler: Add use tracking for Insts * ssa_rewrite: Recursively remove phis * ssa_rewrite: Correct recursive trivial phi elimination * ir: Improve read lane folding pass * control_flow: Avoid adding unnecessary divergant blocks * clang format * externals: Update ext-boost --------- Co-authored-by: Frodo Baggins <baggins31084@proton.me>	2024-12-05 23:14:16 +02:00
baggins183	9ec75c3feb	Implement shader resource tables (#1165) ... * Implement shader resource tables * fix after rebase + squash * address some review comments * fix pipeline_common * cleanup debug stuff * switch to using single codegenerator	2024-11-01 08:55:53 +02:00
squidbus	d91ad6174e	shader_recompiler: Move sampling parameter resolution to tracking pass and support more derivative types. (#1290) ... * shader_recompiler: Move sampling parameter resolution to tracking pass and support more derivative types. * shader_recompiler: Only track sampler sharp on sample instructions. * shader_recompiler: Fix Inst args size.	2024-10-10 19:27:34 +03:00
baggins183	3c0255b953	DebugPrintf in shaders (#1252) ... * Add shader debug print opcode that uses NonSemantic DebugPrintf extension * small correction for flags in Inst * Fix IR Debug Print. Add StringLiteral op * add missing microinstruction changes for debugprint * cleanup. delete vaarg stuff. Smuggle format string in Info and flags * more cleanup * more * (dont merge??) update sirit submodule * fix num args 4 -> 5 * add notes about DebugPrint IR op * use NumArgsOf again * copyright * update sirit submodule * fix clangformat * add new Value variant for string literal. Use arg0 for fmt string * remove string pool changes * Update src/shader_recompiler/ir/value.cpp Co-authored-by: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com> --------- Co-authored-by: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com>	2024-10-06 22:34:40 +03:00
Vinicius Rangel	680192a0c4	64 bits OP, impl V_ADDC_U32 & V_MAD_U64_U32 (#310) ... * impl V_ADDC_U32 & V_MAD_U64_U32 * shader recompiler: add 64 bits version to get register / GetSrc * fix V_ADDC_U32 carry * shader recompiler: removed automatic conversion to force_flt in GetSRc * shader recompiler: auto cast between u32 and u64 during ssa pass * shader recompiler: fix SetVectorReg64 & standardize switches-case * shader translate: fix overflow detection in V_ADD_I32 use vcc lo instead of vcc thread bit * shader recompiler: more 64-bit work - removed bit_size parameter from Get[Scalar/Vector]Register - add BitwiseOr64 - add SetDst64 as a replacement for SetScalarReg64 & SetVectorReg64 - add GetSrc64 for 64-bit value * shader recompiler: add V_MAD_U64_U32 vcc output - add V_MAD_U64_U32 vcc output - ILessThan for 64-bits * shader recompiler: removed unnecessary changes & missing consts * shader_recompiler: Add s64 type in constant propagation	2024-07-27 17:23:59 +03:00
IndecisiveTurtle	a603bc7d88	shader_recompiler: More instructions	2024-07-01 22:42:45 +03:00
raphaelthegreat	5aa3a4d4a0	shader: Fix block processing order in dead code elimination pass	2024-06-06 02:46:36 +03:00
raphaelthegreat	02a50265f8	shader_recompiler: Better branch detection + more opcodes	2024-06-02 03:05:40 +03:00
TheTurtle	8730968385	video: Import new shader recompiler + display a triangle (#142)	2024-05-22 01:35:12 +03:00