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https://github.com/shadps4-emu/shadPS4.git
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66 lines
2.8 KiB
C++
66 lines
2.8 KiB
C++
// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma clang optimize off
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#include "shader_recompiler/frontend/translate/translate.h"
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namespace Shader::Gcn {
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void Translator::V_MOV(const GcnInst& inst) {
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SetDst(inst.dst[0], GetSrc(inst.src[0]));
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}
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void Translator::V_SAD(const GcnInst& inst) {
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const IR::U32 abs_diff = ir.IAbs(ir.ISub(GetSrc(inst.src[0]), GetSrc(inst.src[1])));
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SetDst(inst.dst[0], ir.IAdd(abs_diff, GetSrc(inst.src[2])));
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}
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void Translator::V_MAC_F32(const GcnInst& inst) {
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SetDst(inst.dst[0], ir.FPFma(GetSrc(inst.src[0]), GetSrc(inst.src[1]), GetSrc(inst.dst[0])));
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}
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void Translator::V_CVT_PKRTZ_F16_F32(const GcnInst& inst) {
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const IR::VectorReg dst_reg{inst.dst[0].code};
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const IR::Value vec_f32 = ir.CompositeConstruct(ir.FPConvert(16, GetSrc(inst.src[0])),
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ir.FPConvert(16, GetSrc(inst.src[1])));
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ir.SetVectorReg(dst_reg, ir.PackFloat2x16(vec_f32));
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}
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void Translator::V_MUL_F32(const GcnInst& inst) {
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const IR::VectorReg dst_reg{inst.dst[0].code};
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ir.SetVectorReg(dst_reg, ir.FPMul(GetSrc(inst.src[0]), GetSrc(inst.src[1])));
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}
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void Translator::V_CMP_EQ_U32(const GcnInst& inst) {
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const IR::U1 result = ir.IEqual(GetSrc(inst.src[0]), GetSrc(inst.src[1]));
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if (inst.dst[1].field == OperandField::VccLo) {
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return ir.SetVcc(result);
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} else if (inst.dst[1].field == OperandField::ScalarGPR) {
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const IR::ScalarReg dst_reg{inst.dst[1].code};
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return ir.SetScalarReg(dst_reg, IR::U32{ir.Select(result, ir.Imm32(1U), ir.Imm32(0U))});
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}
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UNREACHABLE();
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}
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void Translator::V_CNDMASK_B32(const GcnInst& inst) {
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const IR::VectorReg dst_reg{inst.dst[0].code};
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const IR::ScalarReg flag_reg{inst.src[2].code};
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const IR::U1 flag = inst.src[2].field == OperandField::ScalarGPR
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? ir.INotEqual(ir.GetScalarReg(flag_reg), ir.Imm32(0U))
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: ir.GetVcc();
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// We can treat the instruction as integer most of the time, but when a source is
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// a floating point constant we will force the other as float for better readability
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// The other operand is also higly likely to be float as well.
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const auto is_float_const = [](OperandField field) {
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return field >= OperandField::ConstFloatPos_0_5 && field <= OperandField::ConstFloatNeg_4_0;
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};
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const bool has_flt_source =
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is_float_const(inst.src[0].field) || is_float_const(inst.src[1].field);
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const IR::U32F32 src0 = GetSrc(inst.src[0], has_flt_source);
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const IR::U32F32 src1 = GetSrc(inst.src[1], has_flt_source);
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const IR::Value result = ir.Select(flag, src1, src0);
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ir.SetVectorReg(dst_reg, IR::U32F32{result});
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}
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} // namespace Shader::Gcn
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