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Add FMA and RCP

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Raven 2024-09-17 01:12:04 +08:00 committed by GitHub
parent dafd8ef781
commit c2fbc532f2
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1 changed files with 16 additions and 0 deletions
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16
src/shader_recompiler/frontend/translate/vector_alu.cpp
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@ -179,6 +179,8 @@ void Translator::EmitVectorAlu(const GcnInst& inst) {
return V_MUL_F32(inst); return V_MUL_F32(inst);
case Opcode::V_RCP_F32: case Opcode::V_RCP_F32:
return V_RCP_F32(inst); return V_RCP_F32(inst);
case Opcode::V_RCP_F64:
return V_RCP_F64(inst);
case Opcode::V_LDEXP_F32: case Opcode::V_LDEXP_F32:
return V_LDEXP_F32(inst); return V_LDEXP_F32(inst);
case Opcode::V_FRACT_F32: case Opcode::V_FRACT_F32:
@ -196,6 +198,8 @@ void Translator::EmitVectorAlu(const GcnInst& inst) {
case Opcode::V_FMA_F32: case Opcode::V_FMA_F32:
case Opcode::V_MADAK_F32: case Opcode::V_MADAK_F32:
return V_FMA_F32(inst); return V_FMA_F32(inst);
case Opcode::V_FMA_F64:
return V_FMA_64(inst);
case Opcode::V_MAX_F32: case Opcode::V_MAX_F32:
return V_MAX_F32(inst); return V_MAX_F32(inst);
case Opcode::V_ADD_F64: case Opcode::V_ADD_F64:
@ -543,6 +547,18 @@ void Translator::V_FMA_F32(const GcnInst& inst) {
SetDst(inst.dst[0], ir.FPFma(src0, src1, src2)); SetDst(inst.dst[0], ir.FPFma(src0, src1, src2));
} }
void Translator::V_RCP_F64(const GcnInst& inst) {
const IR::F64 src0{GetSrc<IR::F64>(inst.src[0])};
SetDst64(inst.dst[0], ir.FPRecip(src0));
}
void Translator::V_FMA_F64(const GcnInst& inst) {
const IR::F64 src0{GetSrc<IR::F64>(inst.src[0])};
const IR::F64 src1{GetSrc<IR::F64>(inst.src[1])};
const IR::F64 src2{GetSrc<IR::F64>(inst.src[2])};
SetDst64(inst.dst[0], ir.FPFma(src0, src1, src2));
}
void Translator::V_CMP_F32(ConditionOp op, bool set_exec, const GcnInst& inst) { void Translator::V_CMP_F32(ConditionOp op, bool set_exec, const GcnInst& inst) {
const IR::F32 src0{GetSrc<IR::F32>(inst.src[0])}; const IR::F32 src0{GetSrc<IR::F32>(inst.src[0])};
const IR::F32 src1{GetSrc<IR::F32>(inst.src[1])}; const IR::F32 src1{GetSrc<IR::F32>(inst.src[1])};