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217d32b502
* Handle DS_READ_U16 & DS_WRITE_B16 * Refactor DS translation * Translate DS_ADD_U64 * format * Fix RingAccessElimination after changing WriteShared64 type * Simplify bounds checking in generated SPIR-V
49 lines
1.8 KiB
C++
49 lines
1.8 KiB
C++
// SPDX-FileCopyrightText: Copyright 2025 shadPS4 Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "shader_recompiler/backend/spirv/emit_spirv_instructions.h"
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#include "shader_recompiler/backend/spirv/spirv_emit_context.h"
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namespace Shader::Backend::SPIRV {
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template <u32 bit_size>
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auto AccessBoundsCheck(EmitContext& ctx, Id index, Id buffer_size, auto emit_func) {
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Id zero_value{};
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Id result_type{};
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if constexpr (bit_size == 64) {
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zero_value = ctx.u64_zero_value;
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result_type = ctx.U64;
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} else if constexpr (bit_size == 32) {
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zero_value = ctx.u32_zero_value;
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result_type = ctx.U32[1];
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} else if constexpr (bit_size == 16) {
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zero_value = ctx.u16_zero_value;
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result_type = ctx.U16;
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} else {
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static_assert(false, "type not supported");
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}
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if (Sirit::ValidId(buffer_size)) {
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// Bounds checking enabled, wrap in a conditional branch to make sure that
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// the atomic is not mistakenly executed when the index is out of bounds.
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const Id in_bounds = ctx.OpULessThan(ctx.U1[1], index, buffer_size);
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const Id ib_label = ctx.OpLabel();
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const Id end_label = ctx.OpLabel();
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ctx.OpSelectionMerge(end_label, spv::SelectionControlMask::MaskNone);
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ctx.OpBranchConditional(in_bounds, ib_label, end_label);
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const auto last_label = ctx.last_label;
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ctx.AddLabel(ib_label);
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const auto ib_result = emit_func();
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ctx.OpBranch(end_label);
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ctx.AddLabel(end_label);
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if (Sirit::ValidId(ib_result)) {
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return ctx.OpPhi(result_type, ib_result, ib_label, zero_value, last_label);
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} else {
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return Id{0};
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}
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}
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// Bounds checking not enabled, just perform the atomic operation.
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return emit_func();
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}
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} // namespace Shader::Backend::SPIRV
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