Commit Graph

402 Commits

Author SHA1 Message Date
squidbus
21a1888857 build: Fix a couple more warnings. (#3598) 2025-09-13 15:33:42 -07:00
Stephen Miller
0bfde1fcde video_core: Check DB_SHADER_CONTROL register before performing depth exports (#3588)
The DB_SHADER_CONTROL register has several enable flags which must be set before certain depth exports are enabled.
This commit adds logic to respect the values in this register when performing depth exports, which fixes the regression in earlier versions of KNACK.
I've also renamed DepthBufferControl to DepthShaderControl, since that's closer to the official name for the register.
2025-09-13 04:32:24 -07:00
TheTurtle
374c2194d4 video_core: Address various UE bugs (#3559)
* vk_rasterizer: Reorder image query in fast clear elimination

Fixes missing clears when a texture is being cleared using this method but never actually used for rendering purposes by ensuring the texture cache has at least a chance to register cmask

* shader_recompiler: Partial support for ANCILLARY_ENA

* pixel_format: Add number conversion of BC6 srgb format

* texture_cache: Support aliases of 3D and 2D array images

Used be UE to render its post processing LUT

* pixel_format: Test BC6 srgb as unorm

Still not sure what is up with snorm/unorm can be useful to have both actions to compare for now

* video_core: Use attachment feedback layout instead of general if possible

UE games often do mipgen passes where the previous mip of the image being rendered to is bound for reading. This appears to cause corruption issues so use attachment feedback loop extension to ensure correct output

* renderer_vulkan: Improve feedback loop code

* Set proper usage flag for feedback loop usage
* Add dynamic state extension and enable it for color aspect when necessary
* Check if image is bound instead of force_general for better code consistency

* shader_recompiler: More proper depth export implementation

* shader_recompiler: Fix bug in output modifiers

* shader_recompiler: Fix sampling from MSAA images

This is not allowed by any graphics API but seems hardware supports it somehow and it can be encountered. To avoid glitched output translate to to a texelFetch call on sample 0

* clang format

* image: Add back missing code

* shader_recompiler: Better ancillary implementation

Now is implemented with a custom attribute that is constant propagated depending on which parts of it are extracted. It will assert if an unknown part is used or if the attribute itself is not removed by dead code elim

* copy_shader: Ignore not enabled export channels

* constant_propagation: Invalidate ancillary after successful elimination

* spirv: Fix f11/f10 conversion to f32

---------

Co-authored-by: georgemoralis <giorgosmrls@gmail.com>
2025-09-12 19:29:16 +03:00
TheTurtle
eb9a7e8fbd liverpool: Write valid queries on PixelPipeStatDump (#3553)
* liverpool: Write valid queries on PixelPipeStatDump

* export: Small assert swap

* liverpool: Advance zpass counter on every dump request
2025-09-07 18:08:26 -07:00
squidbus
38e6dd49b1 shader_recompiler: Support PointSize and ViewportIndex attributes. (#3541) 2025-09-06 20:11:46 -07:00
baggins183
df52585086 Allow vector and scalar offset in buffer address arg to LoadBuffer/StoreBuffer (#3439)
* Allow vector and scalar offset in buffer address arg to
LoadBuffer/StoreBuffer

* remove is_ring check

* fix atomics and update pattern matching for tess factor stores

* remove old asserts about soffset

* small fixes

* copyright

* Handle sgpr initialization for 2 special hull shader values, including tess factor buffer offset
2025-09-03 20:54:23 -07:00
squidbus
c43ab1217d shader_recompiler: Relax dual source blending assert to allow up to two targets. (#3495) 2025-09-01 16:42:48 -07:00
Stephen Miller
c26f56ab02 Handle offsets and format overrides in fetch shaders (#3486)
Co-authored-by: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com>
2025-08-30 14:20:23 -07:00
squidbus
32244c097c shader_recompiler: Implement V_ADD_F64 and loading 64-bit float from SGPR. (#3483) 2025-08-29 18:11:21 -07:00
squidbus
bfa5c508ce constant_propagation_pass: Handle a few more bitwise instructions. (#3482)
Co-authored-by: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com>
2025-08-29 18:11:14 -07:00
Stephen Miller
56626111ab Properly use float type for float buffer atomics (#3480)
Co-authored-by: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com>
2025-08-29 17:18:10 -07:00
Stephen Miller
6f26f66d77 Handle ExecLo source in S_FF1_I32_B64 (#3481)
Co-authored-by: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com>
2025-08-29 16:59:11 -07:00
Stephen Miller
ae89a492ea shader_recompiler: Initialize all ClipDistance and CullDistance values (#3478)
* Initialize all values in clip_distances

Co-Authored-By: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com>

* Clang

* Apply initializer for CullDistance

---------

Co-authored-by: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com>
2025-08-29 16:47:30 -07:00
Stephen Miller
90757d6d09 Handle S_LSHL_B32 in ParseCopyShader (#3477)
Fixes an assert in My First Gran Turismo

Co-authored-by: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com>
2025-08-29 16:33:19 -07:00
Stephen Miller
412355aab4 shader_recompiler: Support multiple attributes using the same load in vertex fetch shaders (#3475)
* Support multiple uses of the same load.

Co-Authored-By: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com>

* Keep base_sgpr as a s32

Requires manually casting to s32 now.

---------

Co-authored-by: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com>
2025-08-29 16:06:40 -07:00
TheTurtle
8ae45559fc vector_interpolation: Address some assertions (#3473) 2025-08-29 13:44:45 -07:00
squidbus
25d1defb5b shader_recompiler: Do not emit Layer when emulating primitive type with tessellation. (#3457)
Layer must be output from the final pre-rasterization stage, so when tessellation is
being used the vertex shader cannot set it. We could pass it through to the tessellation
shaders in some way, but unless it becomes an issue that's more effort than it's worth.
2025-08-25 04:17:20 -07:00
TheTurtle
6d98a5ab60 vk_pipeline_cache: Cleanup graphics key refresh (#3449)
* vk_pipeline_cache: Cleanup graphics key refresh

* position: Don't assert on None mapping

Also check outputs in runtime info so shader is recompiled if they change
2025-08-23 17:16:58 -07:00
squidbus
6590f07772 video_core: Fix some struct comparisons. (#3450) 2025-08-23 17:16:52 -07:00
TheTurtle
6dd2b3090c shader_recompiler: Improve shader exports accuracy (part 1) (#3447)
* video_core: support for RT layer outputs

- support for RT layer outputs
- refactor for handling of export attributes
- move output->attribute mapping to a separate header

* export: Rework render target exports

- Centralize all code related to MRT exports into a single function to make it easier to follow
- Apply swizzle to output RGBA colors instead of the render target channel.
  This fixes swizzles on formats with < 4 channels

For example with render target format R8_UNORM and COMP_SWAP ALT_REV the previous code would output

frag_color.a = color.r;

instead of

frag_color.r = color.a;

which would result in incorrect output in some cases

* vk_pipeline_cache: Apply swizzle to write masks

---------

Co-authored-by: polyproxy <47796739+polybiusproxy@users.noreply.github.com>
2025-08-23 14:39:59 -07:00
kalaposfos13
8a84f1b778 Implement V_CMP_GT_U64 (#3352)
* Implement V_CMP_GT_U64

* Add GroupAny

* Use GroupAny

* Add assert

* clang
2025-08-20 19:53:54 -07:00
TheTurtle
0b02364f97 ir: Perform degamma in shader when sampler sets force_degamma (#3420)
* ir: Perform degamma in shader when sampler sets force_degamma

* specialization: Add srgb if image is sampled

Might fix cases where sampler force_degamma is used with srgb image
2025-08-18 17:41:41 -07:00
baggins183
670067c001 Improve heuristic for attributes passed via ring buffers. (#3426)
Previously a buffer load in a vertex shader could be treated like a ring access, dropping offen vgpr and possibly asserting during resource tracking because of mismatch between types (u32x2 vs U32), caused by inconsistencies in flags (index_enable and offset_enable)
2025-08-17 23:22:40 +03:00
TheTurtle
d9108cd39a video_core: Rework tile manager (#3374)
* video_core: Rework detiling

* video_core: Support tiling and macrotile detiling

* clang format

* image_info: Cleanups

* resource: Revert some changes

* texture_cache: Fix small error

* image_info: Set depth flag on depth promote

* buffer_cache: Remove level check

* tile_manager: Handle case of staging buffer causing flush

* image_info: Add 2D thick array mode

* image_info: Add slices to mip size

* tile_manager: Set bank swizzle

* buffer_cache: Support image copies from DmaData

* vk_rasterizer: Accelerate trivial render target copies with compute

Before tiling PR compute image copies were done with the following sequence

vkCmdCopyImageToBuffer (in SynchronizeBufferFromImage)  -> vkCmdDispatch (copy) -> vkCmdCopyBufferToImage (in RefreshImage)

With the tiling PR it added extra tiling/detiling steps

vkCmdCopyImageToBuffer -> vkCmdDispatch (tiling) -> vkCmdDispatch (copy) -> vkCmdDispatch (detiling) -> vkCmdCopyBufferToImage

This is quite a bit of overhead for a simple image copy. This commit tries to detect trivial image copies i.e cs shaders that copy the full source image to all of the destination.
So now all this sequence is just a vkCmdCopyImage. How much it triggers depends on the guest

* texture_cache: Fix build

* image: Copy all subresources with buffer too
2025-08-08 05:27:11 -07:00
TheTurtle
93767ae31b shader_recompiler: Rework sharp tracking for robustness (#3327)
* shader_recompiler: Remove remnants of old discard

Also constant propagate conditional discard if condition is constant

* resource_tracking_pass: Rework sharp tracking for robustness

* resource_tracking_pass: Add source dominance analysis

When reachability is not enough to prune source list, check if a source dominates all other sources

* resource_tracking_pass: Fix immediate check

How did this work before

* resource_tracking_pass: Remove unused template type

* readlane_elimination_pass: Don't add phi when all args are the same

New sharp tracking exposed some bad sources coming on sampler sharps with aniso disable pattern that also were part of readlane pattern, fix tracking by removing the unnecessary phis inbetween

* resource_tracking_pass: Allow phi in disable aniso pattern

* resource_tracking_pass: Handle not valid buffer sharp and more phi in aniso pattern
2025-07-28 13:32:16 -07:00
baggins183
116554e425 V_ALIGNBYTE_B32 and V_ALIGNBIT_B32 (#3316)
* implement V_ALIGNBYTE_B32 and V_ALIGNBIT_B32

* fix mask

* uncomment alignbit
2025-07-28 00:27:13 -07:00
TheTurtle
93b06ba2da translate: Correct instance id fetch in local shader (#3309) 2025-07-23 23:27:11 +03:00
TheTurtle
19c3d05ac1 shader_recompiler: Use VM bit for conditional discard (#3306) 2025-07-23 20:58:09 +03:00
TheTurtle
4d3578edbe shader_recompiler: Fix incorrect bary coord loads when unsupported (#3303)
* shader_recompiler: Fix incorrect bary coord loads when unsupported

Also properly set sample rate shading

* emit_spirv: Implement BaryCoordSmoothCentroid
2025-07-23 19:46:06 +03:00
TheTurtle
7502739425 control_flow_graph: Treat empty conditional branch as noop (#3296) 2025-07-23 06:09:14 +03:00
Marcin Mikołajczyk
bd0102c8d0 Misc fixes (#3171) 2025-07-20 20:52:05 +03:00
TheTurtle
b56039b15a vk_pipeline_cache: Add fallbacks for R8Srgb and B5G6R5 (#3264)
* vk_pipeline_cache: Add fallbacks for R8Srgb and B5G6R5

* blit_helper: Fix validation error

* renderer_vulkan: Emulate B5G6R5 with swizzle
2025-07-18 12:25:07 +03:00
baggins183
3019bfb978 Implement MUBUF instructions for shorts/bytes (#2856)
* implement loads/store instructions for types smaller than dwords

* initialize s16/s8 types

* set profile for int8/16/64

* also need to zero extend u8/u16 to u32 result

* document unrelated bugs with atomic fmin/max

* remove profile checks and simple emit for added opcodes

---------

Co-authored-by: georgemoralis <giorgosmrls@gmail.com>
2025-07-18 12:04:50 +03:00
TheTurtle
6e350a5085 Avoid clearing HTILE when shader contains address calculation (#3252)
* resource_tracking: Mark image as written when its used with atomics

* texture_cache: Remove meta registered flag

Mostly useless and it is possible for images to switch metas

* vk_rasterizer: Use xor as heuristic for HTILE clear
2025-07-16 01:28:03 +03:00
TheTurtle
83475ac828 attribute: Correct bary coord function (#3253) 2025-07-15 22:55:57 +03:00
Marcin Mikołajczyk
6d6068e0e2 Fix ff1_i32_b64 not accepting vcc as its argument (#3251) 2025-07-15 11:39:37 -07:00
TheTurtle
4407ebdd9b shader_recompiler: Implement guest barycentrics (#3245)
* shader_recompiler: Implement guest barycentrics

* Review comments and some cleanup
2025-07-15 18:49:12 +03:00
TheTurtle
399a725343 shader_recompiler: Replace buffer pulling with attribute divisor for instance step rates (#3238)
* shader_recompiler: Replace buffer pulling with attribute divisor for instance step rates

* flatten_extended_userdata: Remove special step rate buffer handling

* Review comments

* spirv_emit_context: Name all instance rate attribs properly

* spirv: Merge ReadConstBuffer again

template function only has 1 user now

* attribute: Add missing attributes

* translate: Reimplement step rate instance id

* Resolve validation warnings

* shader_recompiler: Separate vertex inputs from LS stage, cleanup tess
2025-07-14 00:32:02 +03:00
TheTurtle
8bc30270c8 shader_recompiler: Implement ff1 with subgroup ops (#3225) 2025-07-10 21:52:56 +03:00
TheTurtle
88abb93669 ir_passes: Fold readlane with ff1 pattern (#3224) 2025-07-10 14:19:44 +03:00
kalaposfos13
ee97c5c110 Define S_TRAP as InstCategory::FlowControl (#3223) 2025-07-10 13:53:38 +03:00
TheTurtle
27cbd6647f shader_recompiler: Reorganize data share operations and implement GDS bit (#3222)
* shader_recompiler: Reorganize data share operations and implement GDS bit

* Review comments
2025-07-10 13:38:50 +03:00
IndecisiveTurtle
dc6ef99dc7 vector_memory: Handle immediate but non zero offset too
Signed-off-by: georgemoralis <giorgosmrls@gmail.com>
2025-07-09 18:40:05 +03:00
TheTurtle
7d4b875ee3 Random fixes (#3216)
* buffer_cache: Handle inline data to flexible memory

* control_flow: Fix single instruction scopes edge case

Fixes the following pattern

v_cmpx_gt_u32 cond
buffer_store_dword value
.LABEL:

Before
buffer[index] = value;

After
if (cond)
{
    buffer[index] = value;
}

* vector_memory: Handle soffset when offen is false

When offen is not used we can substitute the offset argument with soffset and have it handled correctly

* scalar_alu: Handle sharp moves with S_MOV_B64

This fixes unable to track sharp errors when this pattern is used in a shader

* emulator: Add log

* video_core: Bump binary info search range and buffer num
2025-07-09 17:00:06 +03:00
georgemoralis
d6163a6edb uber fix 2025-07-07 13:37:08 +03:00
Paris Oplopoios
4eaa992aff Rename 'AddCary' to 'AddCarry' (#3206) 2025-07-07 13:29:11 +03:00
Paris Oplopoios
146e81a56a Fix V_ADDC_U32 carry-out edge cases (#3200)
* Fix V_ADDC_U32 carry-out edge cases

* Use IAddCarry instead
2025-07-07 12:44:06 +03:00
georgemoralis
4f99f304e6 Revert "Avoid clearing depth on partial HTILE writes (#3167)" (#3190)
This reverts commit 59dd73492b.
2025-07-04 09:57:01 +03:00
TheTurtle
df22c4225e config: Add toggle for DMA (#3185)
* config: Add toggle for DMA

* config: Log new config
2025-07-03 20:03:06 +03:00
TheTurtle
48460d1cbe vector_alu: Improve handling of mbcnt append/consume patterns (#3184)
* vector_alu: Improve handling of mbcnt append/consume patterns

The existing implementation was written to handle a single pattern of mbcnt before the DS_APPEND instruction

v_mbcnt_hi_u32_b32 vX, exec_hi, 0
v_mbcnt_lo_u32_b32 vX, exec_lo, vX
ds_append       vY offset:4 gds
v_add_i32       vX, vcc, vY, vX

In this case however the DS_APPEND is before the mbcnt pattern

ds_append       vX gds
v_mbcnt_hi_u32_b32 vY, exec_hi, vX
v_mbcnt_lo_u32_b32 vZ, exec_lo, vY

The mbcnt instructions are always in pairs of hi/lo and in general are quite flexible. But they assume the subgroup size is 64 so they are not recompiled literally. Together with DS_APPEND they are used to derive a unique per thread index in a buffer (different from using thread_id as order could be random). DS_APPEND instruction works on per subgroup level, by adding number of active threads of subgroup to the GDS counter, essentially giving a multiple-of-64 base index to all threads. Then each thread executes the mbcnt pair which returns the number of active threads with id less than the itself and adds it with the base.

The recompiler translates DS_APPEND into an atomic increment of a storage buffer counter, which already gives the desired unique index, so this pattern is a no-op. On main it was set to zero as per the first pattern to avoid altering the DS_APPEND result. The new handling passes through the initial value of the pattern instead, which has the same effect but works on either case.

* vk_rasterizer: Always sync DMA buffers
2025-07-03 13:19:38 +03:00